Avery Design Systems Verification IP Helps Solid State Storage Controller Startup Validate its Designs and Get to Market Faster

TenaFe Relies on Avery VIP for its PCIe Gen4 NVME DRAMless SSD controller targeting next-generation 5G and IoT applications

Santa Clara, CA., August 1, 2022 — at the Flash Memory Summit, Avery Design Systems, a leader in functional verification solutions, today announced its NVMe®, PCIe® and AXI® Verification IP (VIP) has been adopted by TenaFe, to validate and verify the design of its revolutionary Solid State Storage controllers. Founded by storage industry veterans with proven track records and extensive experience working with VIP, the team at TenaFe chose Avery Design Systems as its VIP partner to ensure it could bring to market its patented technology faster and in full compliance with the latest standards. TenaFe provides unparalleled reliability, performance, and energy-efficient SSDs for a wide range of devices from connected gadgets to personal computers to data centers for next generation 5G and IoT applications.

“As a startup coming out of stealth mode every moment counts, so when it came to selecting a VIP partner our choice was clear. We knew what Avery Design Systems could bring to the table. The technical expertise and background of the support team as well as the level of granularity in the data and information they provide enables us to literally save weeks to months of work. Avery Design Systems has been an integral part of our success,” said Charles Lou, CAD Manager at TenaFe.

TenaFe has adopted a range of VIP from Avery – including the Avery NVMe/PCIe Verification IP (VIP), which ensures comprehensive verification, protocol and timing compliance by implementing a complete set of models, protocol checkers, and compliance testsuites in 100% native SystemVerilog and UVM. The AXI VIP from Avery, part of the AMBA-Xactor VIP helped the company verify connectivity and core enabling the company to confidently tape out two chips.

“Avery is always interested to help customers implement advanced methodologies to better verify their designs and reduce the verification schedule. Working closely with TenaFe from its start enabled them to streamline the design and verification cycle and bring a better, more efficient, leading-edge solution to market,” said Christopher Browy, vice president of sales and marketing at Avery Design Systems. “TenaFe’s highly optimized DRAMless architecture offers outstanding performance, combined with best-in-class power and thermal efficiencies, making it ideal for devices such as ultra-portable laptops, gaming consoles, and edge computing platforms.”

Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential back tracing; and robust core-through-chip-level Verification IP for PCI Express, CXL, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information is available at www.avery-design.com.