Parama Networks Introduces Transport System on a Chip (SoC) Technology Platform to Speed Development of Next Generation transport equipment

Platform features "Six Months Spec to Tape" Initiative to Enable OEMs to Rapidly Respond to Changing Market Conditions

Santa Clara, CA - February 28, 2005 - Parama Networks is introducing at OFC/NFOEC 2005 a technology platform based on their patented System-on-a-Chip (SoC) technology to accelerate time to market for OEMs designing "next gen" transport equipment suitable for the data-centric services that have flooded today's networks and which are expected to grow exponentially for years to come.

Due to the dramatic and fast-moving changes affecting the evolution of network equipment, today's SoC designs carry with them a new degree of complexity that can stretch traditional chip development techniques to the breaking point. This market turmoil creates a challenging environment for the SoC teams -- who must not only track the changes, but often anticipate them.

The "Transport SoC Technology Platform" consists of 3 major elements:

• Industry leading SoC technology that supports high levels of integration, low power consumption, and low cost implementations.
• Compact and scaleable building blocks that allow crucial network functionality to be integrated into an SoC
• A design process that enables a 6 month specification to tape-out phase, significantly improving time to market.

OEMs using Parama's patented SoC technology will reduce overall system cost, lower system power requirements, improve time to market and more easily differentiate their products in the marketplace. Parama's SoC is transforming transport networking by placing all the functions of a full-featured transport node on a single CMOS IC. Applications include DWDM, MSPP, and Ethernet data transport. Current chips in the family incorporate eight programmable tributary interfaces, two line interfaces, and various sizes of non-blocking cross-connect.

Parama's "Transport SoC Technology Platform" features modular designs that enable a high degree of re-use of scaleable, well tested, and thoroughly characterized components and an emphasis on the entire process -- and not just the design phase ? of SoC or system level development. For example, consistent methods and tools ensure fast design execution with high quality and predictability and the verification process becomes much quicker as it is interlinked with the design process using a common and concurrent design flow. These building blocks are implemented on a single piece of silicon, which create dramatic reductions in cost and power while providing scalability, flexibility, density and simplicity in building the next generation of data aware transport systems.

Parama's "Six Months Spec to Tape" process will accelerate the introduction of data-aware SoC silicon, which will allow OEMs to deliver next-generation equipment at least 12 months faster than the present method of operation. Since the company's founding in 2001, the Parama team has developed an analytic process discipline based on a retrospective view of SoC development. This involves collecting information about individual products and pieces flowing into SoC development and conducting "post-op" analysis to understand how the tools performed and how the team spent their time. Parama incorporates sophisticated automated testing techniques adopted from the software industry and adapted for chip verification, further improving the speed and quality of the process.

"Convergent systems-on-chip (SoC) designers need to stop focusing on problems in isolation and find systemic solutions that address the entire design process," said Vinod Empranthiri CEO of ArchSilc Design Automation, Parama's Intelligent Verification Infrastructure supplier. "Complex converged solutions require new approaches to the entire design and verification process. Parama's Transport SoC Technology Platform is an excellent example of a comprehensive, integrated approach to the problem."

"The business benefits are impressive," said Hemant Bheda CEO of Parama Networks. "We have run some business models that quantify the advantages of "Six Months Spec to Tape" in the millions of dollars, as compared to PMO. With the Transport SoC Technology Platform, we can achieve 12-month time to revenue compared with the current industry best practice of 24 months. This translates to real competitive advantage for our customers who, for the first time, can react as quickly as needed to changes in the marketplace."

Using the Transport SoC Technology Platform, the Parama team has been able to achieve excellent time to market as a result of their unique blend of systems level and chip design experience, including three SoC developments with "first pass silicon to production" success.

About Parama Networks
Parama Networks is a fabless semiconductor company specializing in System-on-a-Chip solutions for the telecommunications transport equipment market. The company was funded in March 2001 with support from Azure Capital Partners, Cross Bridge Ventures, Menlo Ventures, Network Angel Capital and Sprout Group. Parama's unique products enable equipment vendors to deliver innovative products with faster time to market, and reduced cost, power and size. Led by a management team that has many years of experience in system-on-a-chip product development, SONET/SDH system design, software development, and marketing, the company has received 3 U.S. Patents and has 21 others pending.