Embedded PowerPC core and auxiliary processor controller unleash new hardware acceleration applications for faster, more flexible embedded systems
EMBEDDED SYSTEMS CONFERENCE, SAN FRANCISCO, Calif., March 7, 2005 - Xilinx, Inc. (NASDAQ: XLNX) today announced that its breakthrough Virtex -4 FX family is rapidly gaining traction with new applications for FPGA-based embedded systems and the availability of the new ML403 development platform. Fueled by the innovative Auxiliary Processor Unit (APU) controller for the integrated dual-PowerPC processor, the Virtex-4 FX platform empowers designers to achieve up to an astounding 20X boost in overall system performance relative to traditional software only execution. This application-specific hardware acceleration approach enables designers to implement faster, more flexible programmable embedded platforms for a broader range of product applications.
Xilinx is demonstrating the latest capabilities of the PowerPC FX APU controller this week at Embedded Systems Conference held March 6-10, 2005 with real-world applications and expert presentations in Booth 1525 (http://www.xilinx.com/events/tradeshows/esc_sf05/index.htm).
Industry Adoption
The Virtex-FX APU controller builds on the proven track record of market adoption and customer success achieved with Xilinx Virtex-II Pro FPGAs, the world's first FPGA with an embedded PowerPC processor. Xilinx is shipping the new Virtex-4 FX devices and development platforms to companies in a variety of end markets including wired and wireless communications, network security, automotive, scientific and medical imaging, as well as test and measurement. With accelerated processing capabilities, the FX APU controller expands the range of options available to embedded system designers for applications such as network encryption, packet processing off-load, enhanced high-definition broadcast video, accelerated storage routines, and waveform processing for algorithmic acceleration.
"Power Architecture runs in a wide array of high performance embedded systems, including much of the world's networking and communications infrastructure," said Nigel Beck, vice president, Technology Marketing, Systems and Technology Group, IBM. "A key dimension of opening up the Power Architecture, in addition to the efforts of the open power.org community, is the extensibility and customization offered by FPGAs such as the Xilinx Virtex-II Pro and Virtex-4 FX solutions."
"We designed our latest Nova identity4 broadcast production video switcher with what we consider a truly disruptive technology utilizing only a single Virtex-II Pro FPGA. This approach reduced our part count 10-fold over prior systems while providing a per channel cost at a fraction of our competition," commented Roger Smith, chief engineer at Echolab. "We are very excited about the new Virtex-4 FX family of devices, where the higher performance processor and integrated APU will allow us to rapidly create hardware modules for accelerating specific software functions. By leveraging these capabilities with the integrated EMAC cores and enhanced RocketIO available in the Virtex-4 FX devices, our next generation systems will further widen the distance between us and our competition."
"Leveraging a high degree of IP design re-use developed with our first Virtex-II Pro based system, we can rapidly migrate our high performance storage networking architecture to the Virtex-4 FX family of devices. By utilizing many of the FX features, we are able to increase both functionality and performance while reducing system cost. Key elements include the enhanced PowerPC processor running Linux OS to manage and control our high throughput multi-channel switching matrix and the integrated dual Tri-mode Ethernet MAC and RocketIO transceivers for high speed data transfer. The APU controller can also offload some tasks via custom defined instructions, resulting in further computing and performance headroom," said Sandy Helton, chief technology officer of SAN Valley Systems.
Virtex-4 FX Platform & APU Controller
The Virtex-4 FX Platform features the industry's only dual 32-bit embedded PowerPC processors running at up to 450 MHz and delivering over 700 Dhrystone MIPS each, while providing a three-fold performance advantage over processors in competing FPGAs. Two fully-integrated, UNH-certified 10/100/1000 Ethernet MACs further increase the Virtex-4 FX processing platform by saving up to 7,200 logic cells, providing increased FPGA resource availability.
The FX APU controller provides embedded system designers with the flexibility to extend the native PowerPC 405 instruction set and significantly improve software algorithm execution utilizing application-specific hardware accelerators implemented in the FPGA logic. Designers can create user-defined instructions for hardware acceleration to achieve a more efficient integration between an application-specific function and the PowerPC processor. Utilizing the high bandwidth, low latency interface established between the APU controller and the FPGA fabric, the APU controller decodes high-performance load and store instructions between the processor data cache or system memory and the FPGA fabric.
For example, a single instruction transfers up to 16 bytes of data - four times greater than a load or store instruction for one of the general purpose registers in the processor itself. Additional examples for floating point and algorithmic calculations are highlighted in the recently published Xcell Journal article entitled, "Accelerated System Performance with APU-Enhanced Processing."
Enabling High Performance Embedded System Development
To build the custom Virtex-4 FX and PowerPC systems, the award-winning Xilinx Platform Studio tool suite abstracts, automates and accelerates implementation without restricting designer innovation. Easy-to-use and menu-driven wizards, including hardware co-processing accelerator generation utilizing a new APU-based fabric co-processor wrapper to simplify integration, are supported by the Platform Studio environment and delivered with the Xilinx Embedded Development Kit.
The latest ML403 development board also targets the essential needs of the embedded system designer. Featuring the Virtex-4 FX12, the compact board supports multiple types of memories and densities with the flexibility of multiple configuration options. Standard peripheral such as serial ports, USB (Host & Peripheral), VGA & AC97 Audio and an expansion header are also included along with easy to use step by step tutorials and a plethora of reference design examples.
Pricing & Availability
The Virtex-4 FX12 is shipping with volume prices starting at $29.99 for 50K units at the end of 2005. The ML403 development board is also available now for order U.S. list priced at $495. Information about Xilinx Virtex-4 FX FPGAs and embedded processing solutions is available online at http://www.xilinx.com/products/design_resources/proc_central/index.htm
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