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Cadence Signoff Solutions Empower Samsung Foundry's Breakthrough Success on 5G Networking SoC Design (Thursday Nov. 30, 2023)
Cadence today announced that Samsung Foundry successfully taped out a 5G networking SoC design on the Samsung 5LPE technology using the Cadence® Quantus™ Extraction Solution and Tempus™ Timing Solution.
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Quantum Effect Technology Breakthrough in Analog Circuit Design (Wednesday Nov. 29, 2023)
SiliconIntervention today announced the successful demonstration of eliminating thermal noise in analog circuits based on quantum tunneling.
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Market Leaders Collaborate with Synopsys to Realize Gains of Generative AI Across Synopsys.ai Full EDA Stack (Monday Nov. 27, 2023)
Synopsys today announced the expansion of its leading Synopsys.ai™ EDA suite, to bring the power of generative artificial intelligence (GenAI) across the full stack in order to dramatically improve engineering productivity for the semiconductor industry.
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QuickLogic Announces New Aurora™ FPGA/eFPGA User Tools with Enhancements for Reconfigurable Computing (Thursday Nov. 16, 2023)
QuickLogic Corporation (NASDAQ: QUIK) has released version 2.4 of its Aurora eFPGA development tool suite. This newest version integrates core tool enhancements that improve the eFPGA utilization and performance of designer's RTL, particularly in the area of reconfigurable computing.
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Thalia's AMALIA (23.4a) qualified on Siemens AFS for increased analog design migration flexibility (Thursday Nov. 16, 2023)
Thalia today announced the release of AMALIA 23.4a. This latest version of the software suite significantly broadens its capabilities by integrating full support for Siemens AFS Simulator in its Technology Analyzer (TA), Circuit Porting (CP), and Design Enabler (DE) tools.
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Synopsys Announces Synopsys.ai Copilot, Breakthrough GenAI Capability to Accelerate Chip Design (Wednesday Nov. 15, 2023)
Synopsys, Inc. (Nasdaq: SNPS) today announced a breakthrough generative artificial intelligence (GenAI) capability for accelerating chip design, Synopsys.ai Copilot.
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Siemens works with Arm and AWS to bring PAVE360 to the cloud and unlocks next generation automotive innovation (Tuesday Nov. 14, 2023)
Siemens Digital Industries Software today announced that its PAVE360-based solution for automotive digital twin is now available on AWS. Expanding on the strong partnership between Siemens and AWS, PAVE360 helps foster innovation in the automotive industry through hardware and software parallel development, “shifting-left" the design phase of SDV.
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Cadence EMX 3D Planar Solver Certified for Samsung Foundry 8nm LPP Process Technology (Thursday Nov. 09, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence® EMX® 3D Planar Solver is now certified for use with Samsung Foundry’s advanced 8nm Low Power Plus (LPP) process technology.
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Cadence Announces Voltus InsightAI, Industry's First Generative AI Technology that Automatically Identifies and Addresses EM-IR Violations (Monday Nov. 06, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the new Cadence® Voltus™ InsightAI, the industry’s first generative AI technology that automatically identifies the root cause of EM-IR drop violations early in the design process and selects and implements the most efficient fixes to improve power, performance, and area (PPA).
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Ansys medini Accelerates Andes' Development of Automotive-Grade IP (Friday Nov. 03, 2023)
To streamline ISO 26262 verification and to integrate verification information conveniently, the decision was made to introduce Ansys medini to achieve the automation and modulization of safety analysis process.
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Zero ASIC Democratizing Chip Making (Thursday Nov. 02, 2023)
Zero ASIC, a semiconductor startup, came out of stealth today to announce early access to its one-of-a-kind ChipMaker platform
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Imperas RISC-V Solutions for Developers - Accelerating RISC-V (Thursday Nov. 02, 2023)
Imperas today announced the latest product updates as a general release to all customers and users. These product updates include the latest models of RISC-V processors, ImperasDV processor verification solutions and the virtual platform based tools for software development and architecture exploration.
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Realtek Deploys Cadence Tempus Timing Solution to Deliver Working Silicon on N12 Design (Thursday Nov. 02, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Realtek successfully used the Cadence® Tempus™ Timing Solution to sign off an N12 high-performance CPU core while achieving significantly improved power, performance and area (PPA).
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Synopsys Delivers Seamless Interoperability for Semiconductor Design Ecosystem with New Synopsys Cloud OpenLink Program (Tuesday Oct. 31, 2023)
The first of its kind program enables chip designers to seamlessly access third-party electronic design automation (EDA) tools and IP in the Synopsys Cloud environment.
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Tenstorrent Teams with Imperas to Provide Model of the Tenstorrent Ascalon RISC-V Core (Tuesday Oct. 31, 2023)
Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Tenstorrent, a next-generation computing company that builds computers for AI, has collaborated with Imperas to make available a model of the Tenstorrent Ascalon processor core as part of the Imperas RISC-V model library.
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Aniah simultaneously validates ISO9001 and ISO27001 certifications, reinforcing its commitment to Quality and Cybersecurity (Monday Oct. 30, 2023)
Aniah is proud to announce its recent success in obtaining both ISO9001 and ISO27001 certifications. These two achievements mark a significant step forward in the company's quality and cybersecurity development plans.
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Ansys Semiconductor Simulation Solutions Certified for UMC's 3D Chip Technology (Thursday Oct. 19, 2023)
Ansys multiphysics solutions have been certified by global semiconductor foundry UMC to simulate its latest 3D-IC WoW stacked technology
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Cadence Collaborates with Broadcom to Implement AI-Driven Solutions with Impressive Quality of Results (Thursday Oct. 19, 2023)
Cadence Design Systems, Inc. today announced a collaboration with Broadcom Inc. to implement new AI-driven design flows to accelerate the delivery of their innovative 3nm and 5nm designs. Using the AI-driven Cadence® Cerebrus™ Intelligent Chip Explorer, many business units achieved impressive performance, power and area (PPA) benefits.
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Imagination Optimizes PPA and Speeds the Delivery of Low-Power GPUs Using AI-Driven Cadence Cerebrus in the OnCloud Platform (Friday Oct. 13, 2023)
Cadence today announced that Imagination Technologies successfully utilized the AI-driven Cadence® Cerebrus™ Intelligent Chip Explorer and the complete RTL-to-GDS digital full flow to accelerate the delivery of their latest low-power 5nm GPUs.
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Accellera Releases Portable Test and Stimulus Standard 2.1 (Tuesday Oct. 10, 2023)
Accellera announced today that its Board of Directors has approved the Portable Test and Stimulus Standard (PSS) 2.1. The latest version of the standard is available for immediate download.
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Siemens extends leadership in EDA design-for-test with the launch of Tessent RTL Pro (Monday Oct. 09, 2023)
Siemens Digital Industries Software today unveiled Tessent™ RTL Pro, an innovative software solution developed to help integrated circuit (IC) design teams streamline and accelerate a broad array of critical design-for-test (DFT) tasks for their next-generation designs.
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MachineWare announces new ARM processor simulation and SystemC profiling products, adds Windows support (Thursday Oct. 05, 2023)
With the launch of the CHARM simulator and inSCight profiler, MachineWare GmbH, headquartered in Aachen, is rapidly expanding its virtual prototyping products portfolio towards simulation of new processors and more efficient SystemC modelling.
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ELES and proteanTecs Partner to Enhance Reliability Testing with Deep Data Analytics (Thursday Oct. 05, 2023)
The collaboration combines proteanTecs’ Health and Performance Monitoring solutions with ELES’ Design for Reliability methodology and advanced reliability test platforms.
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CEA and Siemens collaborate on research to expand applications of Digital Twin for industry (Tuesday Oct. 03, 2023)
Siemens Digital Industries Software and CEA-List, a technological research institute focused on smart digital systems research, announced today the signing of a memorandum of understanding to collaborate on research to further extend and enhance digital twin capabilities with artificial intelligence (AI) and explore greater integration of embedded software on both virtual and hybrid platforms.
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Keysight, Synopsys, and Ansys Accelerate RFIC Semiconductor Design with New Reference Flow for TSMC's Advanced 4nm RF FinFET Process (Thursday Sep. 28, 2023)
Keysight Technologies, Inc. (NYSE: KEYS), Synopsys, Inc. (Nasdaq: SNPS), and Ansys (Nasdaq: ANSS) announced a new reference flow for the TSMC N4PRF, the world’s leading semiconductor foundry’s advanced 4 nanometer (nm) radio frequency (RF) FinFET process technology.
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Cadence Digital and Custom/Analog Design Flows Achieve the Latest TSMC N2 Certification (Thursday Sep. 28, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced its digital and custom/analog flows have achieved certification for TSMC’s latest N2 Design Rule Manual (DRM).
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Cadence Expands Support for 3Dblox 2.0 Standard with New System Prototyping Flows (Thursday Sep. 28, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of new system prototyping flows based on the Cadence® Integrity™ 3D-IC Platform that support the 3Dblox 2.0 standard.
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Siemens and TSMC collaborate to help mutual customers optimize designs using foundry's newest advancements (Wednesday Sep. 27, 2023)
Siemens Digital Industries Software today announced new certifications and collaborations with longtime partner TSMC, resulting in the successful qualification of multiple industry-leading Siemens EDA product lines for the foundry’s latest process technologies.
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PrimisAI Forms to Revolutionize Hardware Design with Leading AI Solutions (Wednesday Sep. 27, 2023)
PrimisAI, a pioneering newcomer to the hardware design landscape, is thrilled to announce its official launch. The company debuts with pushing forward the development and commercialization of the groundbreaking generative AI-based tool, RapidGPT, designed to revolutionize FPGA design.
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Cadence AI-Powered Virtuoso Studio Supports RF and mmWave Design Reference Flows for TSMC N16RF, N6RF and N4PRF (Tuesday Sep. 26, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced it has collaborated with TSMC to integrate the new Cadence® Virtuoso® Studio into the TSMC N16 mmWave design reference flow and N6RF design reference flow, and added support for the N4PRF design reference flow.