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Thursday, July 30, 2026

• Rambus Reports Second Quarter 2026 Financial Results
• Korea secures partnership with AMD to advance domestic AI infrastructure
• Global semiconductor market tops $1.5 trillion for the first time, full interpretation of SIA's latest report
• Cadence Reports Second Quarter 2026 Financial Results
• The Performance Boost for AI: Quantum Computing-Based Methods Make Training of Large Data Models More Efficient
• PQSecure and QuickLogic Demonstrate Reprogrammable Post-Quantum Security for Next-Generation SoCs
• From Co-Packaged Optics to Nanolasers: Photonics Moves Inward
• Keysight Certifies Electromagnetic Design Software for Intel Foundry’s Latest Processes
• Siemens’ IC design solutions now certified for Intel 14A and Intel 18A-P process technologies
• GlobalFoundries signs letter of intent with the U.S. Department of Commerce for a $300 million award to accelerate U.S. silicon photonics leadership
• UMC Announces Fab Expansion in Singapore and Construction of New Fab in Tainan to Meet Accelerating AI Demand

Wednesday, July 29, 2026

• Digital Blocks Marks 20 Years of the DB9000 Display Controller IP Family
• BrainChip AKD1500 Now Available in Compact M.2 Form Factor, Enabling Fanless Edge AI in Industrial and Commercial Designs

Tuesday, July 28, 2026

• Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A
• Synopsys Advances Agentic AI Chip Design with AMD and Microsoft
• Andes Technology and Mirabilis Design Announce Collaboration on System-Level Models for Andes RISC-V Processor IP
• IP Cores, Inc. Releases LZR4D Terabit-Class Ultralow-Latency Single-Engine LZ4 Decompressor Core

Monday, July 27, 2026

• Scalable Network Interconnect IP Core Addresses Growing On-Chip Communication Challenges in Next-Generation SoCs
• Silvaco to Accelerate Physics-Based Digital Twins for Semiconductor Design and Manufacturing Using NVIDIA AI and Accelerated Computing
• Muse Semiconductor and True Circuits Announce New IP Access Program Offering High-quality PLLs to Universities at Low Cost
• Vietnam, Japan launch five joint semiconductor research projects
• How Industrial IoT Is Transforming Semiconductor Manufacturing
• AI in EDA Is Real, It’s Now, and It’s on Show at DAC 2026
• Post-Quantum Cryptography Incorporated into SoCs via eFPGA
• RISC-V Market Size To Exceed $25.07 Billion By 2035
• Charting RISC-V’s Future in HPC
• Siemens advances self-verifying agentic AI workflows for semiconductor and PCB design
• Intel and Lens Technology Collaborate to Enable Advanced Semiconductor Packaging for the AI Era
• Samsung Electronics and Broadcom Expand Strategic Collaboration Across Memory and Foundry Technologies
• Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology
• True Circuits Announces the JSPICE™ Design Environment (JDE™) will be Offered to the JDE Ecosystem Open Source

Saturday, July 25, 2026

• Lee outlines plan to transform Korea into pillar of global AI supply chain
• South Korea’s semiconductor boom risks flatlining under US–China pressure

Friday, July 24, 2026

• Can India become the next semiconductor hub after Taiwan?
• Intel and Fortinet Collaborate to Advance Cybersecurity Innovation and Strengthen Global Supply Chain Resilience
• Synopsys Announces Earnings Release Date for Third Quarter Fiscal Year 2026
• True Circuits Announces the JSPICE™ Design Environment (JDE™) will be Offered Open Source at the Design Automation Conference
• Synopsys Enables AMD Instinct™ MI455X GPU Design with Comprehensive Multi-Die Solution
• Real Intent Launches Riven™ Sign-Off AI Agent for 10X Faster Sign-Off

Thursday, July 23, 2026

• Japan-based semiconductor expert sees broad cooperation opportunities with Vietnam
• Samsung, SK and Naver leaders to meet Nvidia CEO Jensen Huang in U.S. AI talks
• Arteris to Announce Financial Results for the Second Quarter 2026 on Thursday, August 6, 2026
• InfiniNode secures EUR 2 million financing to advance on-chip data movement technologies for next-generation compute systems
• EnSilica secures €1.1 million satellite chip orders as beamformer demand grows (LSE:ENSI)
• ELECTRA IC Unveils Comprehensive IP Core Suite for Next-Generation Post-Quantum Cryptography
• Agnisys unveils IDS-AI agentic framework and NoC automation at DAC 2026
• Intelligent and Adaptive AR Experiences with TDK
• Siemens to acquire Precision Innovations to expand AI-powered system-on-a-chip design exploration and optimization
• BrainChip Partners with Celus to Bring Its Neuromorphic Edge AI Processor to the CELUS Design Platform
• RISC-V Europe Summit 2026: Beyond Embedded Electronics
• Charting RISC-V’s Future in HPC
• Menta Contributes to the Successful Completion of the European Processor Initiative and Confirms its Role in Shaping Future Computing Architectures
• TES Electronic Solutions Introduces an Over-Voltage Lockout IP for the Protection of Battery-Powered Systems in X-FAB's XT018 – 0.18µm BCD-on-SOI Technology
• CEA-Leti Looks Beyond SRAM and DRAM as AI Reshapes the Memory Roadmap
• Keysight Addresses Cross-Domain Physics Issues That Leave Electronic Designs Vulnerable to Late-Stage Failure
• SemiAnalysis teardown shows SMIC's N+3 node matches Intel's 18A in metal pitch
• Samsung Foundry completes tape-out of Tesla’s next-gen AI chip

Wednesday, July 22, 2026

• Siemens to acquire Defacto Technologies to complement its EDA portfolio with automated SoC design creation

Tuesday, July 21, 2026

• Arteris Deployed by Speedata for Data Center Compute
• CAST Enhances Serial Memory Controller IP with Encryption, Low-Power, and ASIL-Ready Options