With more than 15 years of experience in developing analog IP solutions, Synopsys offers a comprehensive portfolio of more than 100 silicon-proven DesignWare® Data Converter IP products consisting of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), auxiliary converters, video DACs (VDACs) and analog front-ends (AFEs).
Synopsys' strong application expertise in areas such as mobile and wireless communication (i.e., LTE/LTE-A, WiFi.11n, WiFi.ac), wireline communication (i.e., G.hn, MoCA), IF demodulation, multimedia, imaging and digital TV, Internet of Things (IoT), sensor and embedded applications, enables us to deliver high-quality data converter IP that helps system-on-chip (SoC) designers meet the specific design requirements for their target applications.
The DesignWare Data Converter IP products offer very high performance, high speed, ultra low-power dissipation, small area, and support for a wide range of foundry process technologies ranging from 180-nm to 28-nm. Synopsys' high-quality DesignWare Data Converter IP products have been implemented in more than 200 SoCs, giving designers confidence that they can successfully integrate high-performance, low-power analog IP into their designs with less risk and improved time-to-market. See why Synopsys is the Trusted Analog IP Partner.
- #1 provider of data conversion IP for eleven years in a row (Gartner, 2015)
- Over 15 years of delivering proven advanced ADC/DAC data conversion solutions
- Optimized data converter IP offering for broadband communications, multimedia, IoT, sensors and more, leveraging extensive application expertise
- High performance, high speed, low-power 12-bit up to 320 MSPS ADC and 12-bit up to 640 MSPS DAC
- High performance, ultra-low power 12-bit and 14-bit up to 5 MSPS SAR ADC for sensor data acquisition Complete offering including auxiliary converters, PLL and AFE for communications
- A wide range of foundry process technologies in production from 180-nm to 28-nm
- Behavioral Verilog model
- Abstract LEF and timing LIB files
- CDL netlist for LVS
- GDSII layout database
- Assembly guidelines and full integration support