The Quad Full HD LCD Controller IP Core interfaces a video image in frame buffer memory via the AMBA 3.0 / 4.0 AXI Protocol Interconnect to a Quad Full High Definition (QFHD) TFT LCD panel (3840 x 2160) as well as Full HD panels (1920 x 1080).
- Support for following LCD Panel resolutions:
- 3840 x 2160 Quad / Ultra Full High Definition (QFHD)
- 4096 x 2160 Digital Cinema Systems (DCI)
- 1920 x 1080 Full High Definition
- Programmable resolutions down to QVGA
- Video / Graphics Base Screen with up to 16 Overlay Windows
- Interface for 1,2, 8 Port TFT UHD LCD Panel
- Interface to LVDS, DVI, HDMI, V-by-One HS, & DisplayPort Transmitters / Receivers
- RGB (4:4:4 sampled) and YCrCb (4:2:2 / 4:4:4 sampled) color spaces with conversion
- Alpha Blending
- ARM TrustZone Compliant
- High performance AMBA AXI4 / AXI3 Interconnect
- The DB9000AXI-UHD IP Core contains programmable features comparable to entry-level ASSP DTV & LCD controller chips,targeting FPGA & ASIC designs.
- Verilog RTL Source or technology-specific netlist.
- Comprehensive testbench suite with expected results.
- Synthesis scripts.
- Installation & Implementation Guide.
- Technical Reference Manual.
Block Diagram of the Quad Full HD LCD Controller IP Core