English
CryptOne- 100% Safe Cryptographic System for RSA, Diffie-Hellman and ECC with AMBA AHB, AXI4 and APB
You are here:
8-bit SAR ADC_SMIC_65_LL
The ADC can be placed into a power down standby mode of operation reducing power to well below 1 mW. The format of the output is unsigned binary coding. External reference ports are also provided for flexible analog input range. Power adjustment control is provided to save power consumption if the actual operating speed is significantly lower than 200Msps.
Features
- 1. Time interleaved architecture for excellent dual channel matching performance.
- 2.Programmable maximum differential input from 0.5Vdpp to 1.0Vdpp.
Benefits
- 1. Internal reference
- 2. Compact Die Area
Deliverables
- 1.Datasheet
- 2.Flat Netlist (cdl)
- 3.Layout View (gds2)
- 4.Abstract View (lef)
- 5.Timing View (lib)
- 6.Behavioral Model (Verilog)
View 8-bit SAR ADC_SMIC_65_LL full description to...
- see the entire 8-bit SAR ADC_SMIC_65_LL datasheet
- get in contact with 8-bit SAR ADC_SMIC_65_LL Supplier
ADC & DAC
- 24bit Audio ADC/24bit Video DAC
- 100 dB Dynamic Range, 24-bit stereo CODEC with six-channel ADC, digital PWM DAC and a low-noise embedded voltage regulator
- 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
- 16-Bit Sigma-Delta CODEC (ADC & DAC) with headset, handset and 400mW Speaker Amplifier, Dongbu 0.11um
- 11-bit, 2MSPS SAR ADC/DAC - 11-bit, 15MSPS, Hybrid SAR AMS 0.35 μm
- The S13V33_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC and 2-channel 24bit sigma-delta DAC with headphone driver amplifier.