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32-bit IP Listing

1188 IP Cores (441 - 480)

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Watchdog Timer (WDT)

The WDT is used to generate a variety of output signals after a user programmable count. Three outputs are made available to provide a system reset, an interrupt pulse and an external signal ...

441
10 Gigabit to 1 Gigabit Ethernet Converter for XAUI20

The XG2G20 wrapper allows a 10 Gigabit Ethernet MAC to operate at 1000 and 100 Mb/s data rates in addition to 10 Gb/s. Using the XG2G20 a 10G Ethernet MAC, clocked at 15.625MHz, can be connected ...

442
PCI Express (PCIe) Gen3 x8

The Controller IP for PCIe 3.0 has over 100 configuration features, and 1500+ input parameters, to customize the controller to the specific needs of any application. With rich configurations ...

443
Multi-Link Multi-Protocol SerDes - 10G-KR PHY TSMC 16FF+GL

Cadence 16Gbps Multi-Link and Multi-Protocol PHY - silicon proven, high-speed SerDes PHY IP, designed to simultaneously run different protocols at different clock signal rate on a per lane basis. ...

444
MIPI SLIMbus Device Controller V2.0

The MIPI SLIMbus Device Controller IP is designed to provide MIPI SLIMbus 1.01 compliant connectivity for a peripheral device, like an audio codec, to a SLIMbus compliant host, like an Applications ...

445
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm

The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it. New applications are emerging and innovative IP solutions are needed to keep ...

446
GF L90LP 90nm IoT PLL - 30MHz-375MHz

The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication factors up to 8192, allowing the PLL to ...

447
GF L14LLP 14nm IoT PLL - 30MHz-625MHz

The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication factors up to 8192, allowing the PLL to ...

448
HEVC/H.265 Main10 Profile Decoder IP for UHD(4K)

The Chips&Media WAVE410 is one of the most advanced hardware video decoder IP core, which supports the next-generation HEVC(High-Efficiency Video Coding) standard, also known as H.265. The ...

449
Ensigma Low power Wi-Fi IEEE 802.11b/g/n 1X1 in TSMC 40 nm LP IP

The Ensigma Low Power Wi-Fi consists of end to end solution including RF, AFE, baseband PHY and MAC. The IP is supplied as a hard macro for the analogue section and synthesisable RTL for the ...

450
UDP/IP Hardware Protocol Stack

Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone operation, the core is ideal for offloading ...

451
MIPS proAptiv Superscalar Multiprocessor

The proAptiv™ processor family is part of the new MIPS Aptiv™ generation of processor IP cores from Imagination, designed to deliver the compelling top-line performance required for tomorrow’s ...

452
Standalone controller for the Controller Area Network

The DCAN is a standalone controller for the Controller Area Network (CAN), which is commonly used in automotive and industrial applications. What's most important, the DCAN conforms to the ...

453
80251 IP

The DQ80251 is a revolutionary Quad-Pipelined ultra high performance, speed optimized soft core of a 16-bit/32-bit embedded microcontroller. The core is fully configurable and allows selection ...

454
Silicon Proven Multimedia gateway Solution from Tier1 Company

The iD325 is next generation DOCSIS® 3.1 device for data gateway applications. It can also be used as cable modem, eMTA (embedded Media Terminal Adapter) or as a front-end device for headed ...

455
Highly Configurable USB 2.0 Super Speed host Controller

USB 2.0 Host controller is a highly configurable core and implements the USB 2.0 Host functionality that can be interfaced with third party USB 2.0 PHY’s. USB2.0 Host controller core is part ...

456
Configurable CAN Bus Controller

The DCAN FD is a standalone controller for the Controller Area Network (CAN), widely used in automotive and industrial applications. It conforms to Bosch CAN 2.0B specification (2.0B Active) ...

457
SD/SDIO Device IP Core

SD/SDIO Combo Device IP core is an SD memory controller and an SDIO controller with an AHB interface. Combining with the optional our SD/SDIO Combo Device IP provides an integrated SD memory ...

458
PCI-X Initiator/Target Core

PCI-X is an evolutionary design and an enhancement of the industry standard PCI-X bus. The PCI-X enables 64-bit designs to operate at speeds upto 133 MHz. The PCI-X achieves this performance ...

459
800 Gigabit Ethernet Base-R PCS Core

The 800 Gigabit Ethernet Base-R PCS Core follows the 400G IEEE 802.3bs standard and is designed to be used in conjunction with the MorethanIP 800 Gigabit Ethernet MAC Core to create flexible ...

460
I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)

The Digital Blocks DB-I2C-S-APB / DB-I2C-S-AHB / DB-I2C-S-AXI / DB-I2C-S-AVLN Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC,NIOS II or other high performance microprocessor via the ...

461
ITU G.704 E1 Framer/Deframer

Noesis Technologies ntE1_G704 Framer/Deframer is designed for E1 networks and is compliant with ITU recommendations G.704, G.706, G.732, G.775 and O.163. The core provides all the necessary ...

462
100-Gbps Ultra-Low Latency Ethernet MAC & PCS (100GBASE-R4, 100GBASE-R10)

The Ultra-Low Latency Ethernet MAC and PCS is the ideal core for latency critical applications. These IP cores are designed to minimize congestion, to eliminate high fan-out nets, and to ...

463
PCI-ISA Bridge

Compliant with PCI bus specification 2.1 and 2.2. ; Convert PCI transaction to ISA bus transaction. ; Function as PCI target on PCI bus. ; Function as ISA master on ISA bus. ; Map PCI address ...

464
Content Adaptive Deinterlacer

The Trilinear Technologies AVP-35 Content Adaptive Deinterlacer core provides advanced algorithms and high quality results for demanding video applications. The AVP-35 implements content adaptive ...

465
Image Scaler

The Trilinear Technologies AVP-27 Image Scaler provides high quality results for demanding video applications. The AVP-27 balances complexity and resource usage for an optimal solution capable ...

466
eMMC/MMC Card Slave Controller

The eMMC/MMC Card Slave Controller IP Core is compatible with eMMC/MMC specification 4.41 and it supports Dual Data Rate (DDR) data transfer.

467
ISO/IEC 14443 type B protocol manager for Proximity Integrated Circuit Card (PICC)

The ISO 14443 Type B Digital Controller is a fully integrated protocol manager intended for Proximity Integrated Circuit Card (PICC).

468
AMBA AHB Slave to Local Interface Bridge

The Veriest AMBA AHB Slave Bridge Design IP offers a simple solution to provide a bridge between the embedded AMBA AHB bus and a simplified generic local bus. The Veriest AMBA AHB Slave Bridge ...

469
SATA 3 HOST IP on ARRIA 10 FPGA

The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The LDS-SATA3-HOST-A10GX IP is compliant with ...

470
3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO Turbo Decoder with Optional Viterbi Decoder

This is a fully compatible 3GPP (UMTS and LTE) and 3GPP2 cdma2000 (1xEV-DV Release D and 1xEV-DO Release B) error control decoder. The decoder can be used to decode the standard 3GPP or 3GPP2 ...

471
Multi State Viterbi Decoder

The Multi State Viterbi Decoder IP Core is a low complexity 16, 32, 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm. The decoder is designed for maximum ...

472
Divider

The Divider Generator LogiCORE™ IP provides a resource efficient and high performance solution for integer division. The integer division can be implemented using Radix-2 non-restoring division, ...

473
3GPP KASUMI f8 and f9 cores

KASUMI is a 64-bit block cipher which uses a 128-bit key. It forms the basis of the confidentiality (f8 or UEA1) and integrity (f9 or UIA1) algorithms which provide data security for signalling ...

474
1KB/ECC40 NAND Flash BCH Encoder/Decoder

The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission. BCH is optimal for applications where errors are non-correlated ...

475
Hardware 3DES Accelerator

• Designed for low latency and high throughput applications in embedded systems • Specially optimized for hardware acceleration of Linux CryptoAPI subsystem • DES/3DES encryption and ...

476
NAND Flash Controller

• Specially designed for high performance with MTD Drivers Linux subsystem • Support for 8-bit NAND-Flash chips • Reading speed up to 40 MB/sec • Hardware checksum calculation ...

477
1KB/ECC96 NAND Flash BCH Encoder/Decoder

The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission. BCH is optimal for applications where errors are non-correlated ...

478
Avalon Mobile DDR Memory Controller

The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in Avalon® multi-master streaming data systems. Advanced design ...

479
CSIX to PI40

As stated by the CSIX Forum, the CSIX standard defines the physical and message layers of the interconnect between traffic managers (TM) and the switching fabric. The CSIX interface is designed ...

480

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