32-Bit Processors for High-Performance Embedded Applications
The DesignWare® ARC® HS45D and HS47D processor feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where high-performance and high clock speed plus signal processing are required. The cores can be clocked at up to 1.9 GHz in 16ff processes (worst case, single core, base configuration) and offer outstanding performance delivering 2.5 DMIPS/MHz and 5.0 CoreMark/MHz with a small area footprint and low power consumption.
The processors are based on the advanced ARCv2DSP instruction set architecture (ISA) and pipeline, which provides leadership performance-efficiency and code density, and more than 150 DSP instructions. For applications requiring higher performance, dual- and quad-core versions of the HS45D and HS47D cores are available.
The ARC HS45D features close coupled memory (CCM) and is optimized for use in applications where real-time, deterministic behavior is required. The HS47D is designed for high-performance embedded applications that require cache and includes all of the features of the HS45D plus support for up to 64K Level 1 (L1) instruction and data cache.
The processors are designed to be used in applications such as wireless baseband, voice/speech processing, home audio, automotive systems, and other high-end embedded applications that require signal processing.
- Combination Dual-issue, 32-bit RISC + DSP processor
- Delivers up to 4750 DMIPS and 9500 CoreMark per core at 1.9 GHz on 16ff (worst case conditions, single-core configuration)
- ARCv2DSP ISA adds over 150 DSP instructions
- Easy DSP programming support with Metaware C/C++ Compiler
- Feature-rich DSP software library for easy algorithm programming
- One 32x32, Two 16x16, or two dual 16x16 MACs/cycle
- Fixed point, vector/SIMD DSP processing support
- Based on advanced ARCv2 ISA; Support for custom instructions
- Support for up to 16MB of close coupled memory and direct mapping of peripherals
- Dual- and quad-core versions for higher performance
- The DesignWare ARC HS45D and HS47D processors are delivered as Verilog HDL in the ARChitect IP Library
- The HDL is configured and output from the ARChitect IP Configurator tool
- To test that the product performs as expected, a basic testbench of Customer Confidence Tests (CCT) is included