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Capless LDO with Noise Quencher Technology (UMC 180 nm, 300 mA, excellent supply rejection and fast settling)
The Capless LDO IP core is optimized for Application Specific Integrated Circuits (ASICs), System-on-a-Chip (SOC) and microprocessor integration. The Capless LDO can hold a steady output voltage reference without using an external capacitor. The LDO uses Noise Quencher(TM) Technology to provide unparalleled power supply rejection at high frequencies.
Benefits
- Adds value to your microchip with embedded power management
- Fewer components and smaller board area (NO external capacitor)
- Improved reliability
- Reduced inventory and reduced BOM management overhead
- Longer battery life (save power through integration)
- Low risk for customer product/program with a silicon proven capless LDO IP core.
Deliverables
- Datasheet and user’s guide with integration guidelines
- Behavioral simulation model
- Schematics and/or spice netlist
- Layout (GDSII)
- Integration and test support
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Capless
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