The CoreHPDMACtrl soft IP is used to control the high performance direct memory access (HPDMA) of the microcontroller subsystem (MSS) in SmartFusion®2 or high-performance memory subsystem (HPMS) in IGLOO®2 and also monitors the transaction status. CoreHPDMACtrl selects the buffer descriptor, initiates the transactions on the fabric interface controller (FIC) and configures the MSS or HPMS HPDMA. It also monitors the interrupts for transfer done and transfer error. The soft IP also re-configures the registers of HPDMA to prepare it for the next transfer.
- Provides four HPDMA buffer descriptors.
- Starts and resets the memory descriptor.
- Provides source and destination address for each descriptor.
- Provides size and direction of transfer for each descriptor.
- Provides DMA transfer complete and error interrupts.
- Provides advanced high-performance bus (AHB)-Lite master interface to the FIC on the MSS or HPMS.
- Supports word-aligned data transfers.