EFLX1K is an area optimized eFPGA for 40 to 180nm processes.
It is able to create arrays of 1K, 2K, 3K, 4K, 6K, 8K, 9K, 10K, 12K and 16K in size with any mix of the Logic and DSP core versions.
It has fewer interconnect resources than the EFLX4K (since arrays of 4x4 are sufficient in older nodes) hence is 10-20% more area efficient.
The EFLX1K Logic and DSP cores can be ported to any process node in about 6 months on customer demand
Block Diagram of the EFLX1K Logic & DSP eFPGA cores for 40-180nm