GDDR6 and GDDR5X PHY IP
The 2x16-bit GDDR6 PHY instance is complete with built-in hardware logic for CA, WCK2CK, Read and Write data eye training, as well as hardware for continuous phase tracking to compensate supply voltage and temperature drift.
The GDDR6 PHY IP is delivered in both Soft-IP and Hard-IP components. The soft-IP component can be hardened upon request. For top/bottom die edge vs left/right die edge PHY instantiations, a different hard-IP view is available and would be required.
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Block Diagram of the GDDR6 and GDDR5X PHY IP
