The HDMI™ 1.3 Receiver (RX) controller and PHY IP solution provides the necessary logic to implement and verify designs for various consumer electronic applications. The HDMI 1.3 TX IP solution includes a suite of configurable digital controllers and high-speed, mixed-signal PHY IP, thus providing a comprehensive solution from a single IP vendor. The HDMI 1.3 RX IP provides designers with a high-performance HDMI sink solution that is extremely low in power and area.
Compliance with HDMI and HDCP specifications with certification from the NXP HDMI authorized testing center and successful interoperability results from HDCP plugfest events
System validation based on the Synopsys Confirma HAPS-51 rapid prototyping platform
modular core with low gate count
Digital controllers delivered in configurable RTL allows designers to optimize gate count and power consumption by choosing only the features required in their application
Numerous optional features such as High-bandwidth Digital Content Protection (HDCP) encryption engine, various audio formats, audio DMA engine and multiple system-bus interfaces help to ease the integration effort