The DesignWare® IP Prototyping Kits for PCI Express 3.0 and PCI Express 2.0 center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic, implemented on Synopsys' HAPS®-DX FPGA-based prototyping system.
With a proven reference design for the IP, designers can be instantly productive, enabling them to accelerate the integration of IP into their target SoC, optimize the IP configuration, and develop drivers and software applications with real world I/Os and hardware. The prototyping kits take advantage of Synopsys' HAPS Developer eXpress (HAPS-DX) system to provide prototyping hardware and software automation tools. Scripts and configuration files enable fast iteration.
The IP Prototyping Kits can be used as a physical target for early software bring-up, debug and test concurrently with SoC development. Out-of-the-box support for Linux software stack or Windows ensures that software developers are up and running instantly and can focus on the IP specific software (e.g., drivers, bootcode, firmware). The kits plugs into existing software tool chains and interfaces seamlessly with popular embedded software debuggers, providing system-wide debug and analysis capabilities.
- Power management, clock and reset control block
- Pre-instrumented debug for most interfaces
- Multiple kit and configuration options available:
- - DesignWare IP Prototyping Kit for PCI Express 3.0 Endpoint offers connectivity to PC and optional ARC Software Development Platform
- - DesignWare IP Prototyping Kit for PCI Express 3.0 Root Complex with ARC Software Development Platform
- - DesignWare IP Prototyping Kit for PCI Express 2.0 Endpoint offers connectivity to PC and optional ARC Software Development Platform