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Silicon IP Catalog
Memory Controller & PHY
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Memory Controller & PHY IP Core

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Memory Controller & PHY IP Listing

643 IP Cores (81 - 120)

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ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm

The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it. New applications are emerging and innovative IP solutions are needed to keep ...

81
Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC

The DesignWare® SD/eMMC Host Controller IP addresses the growing storage needs of mobile, consumer, IoT and automotive applications. The IP provides advanced features such as ADMA3 for the ...

82
Always-on Voice Activity Detection interfacing with analog microphones

The WT-a-HD.01 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications.

83
7 track High Density standard cell library at TSMC 40 nm

TSMC 40 LP, SESAME HD provides the best trade-off between area and power achieved from an innovative cell design enabling 6-track cells and 1P3M SoC implementation.

84
Northwest Logic HBM2 Controller Core

tHE High Bandwidth Memory (HBM) DRAM Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The core accepts commands ...

85
Northwest Logic GDDR6 Controller

Northwest Logic’s GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The core accepts commands using ...

86
High Efficiency FPGA Memory Controller (DDR3, DDR4, ...)

The DDR/DDR2/DDR3-SDRAM memory controller IP Core supports both Single Data Rate (SDR) and Double Data Rate (DDR / DDR2 / DDR3) SDRAM devices. The memory controller IP Core is an assembly ...

87
SD4.0 UHS-II PHY in TSMC40LP

SLI SLIPSDXU2XXXXX is PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed interface for both SDHC and SDXC. By using SLI’s ...

88
SD4.0 UHS-II PHY in GF28SLP

The SD4.0 UHS-2 PHY is PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed interface for both SDHC and SDXC. By using SLI’s ...

89
SD4.0 UHS-II PHY in Samsung 28LPP

SLI SLIPSDXU2XXXXX is PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed interface for both SDHC and SDXC. By using SLI’s ...

90
SD UHSII PHY in GLOBALFOUNDRIES 28SLP

SLIPSDHU2AG28SLP is a physical layer for SD UHS-II. This IP consists of two parts, one is a synthesizable digital part (SLIPSDHU2AG28SLP_D) and the other is an analog part (SLIPSDHU2AG28SLP_A). ...

91
Single, Dual and Quad SPI Flash Controller with Boot and Execute On-The-Fly Features

The Alma Technologies SPI-MEM-CTRL core offers the interconnection between a host and an SPI Flash memory device. The SPI-MEM-CTRL supports Single, Dual Input, Dual Input/Output, Quad Output ...

92
Universal NVM Express Controller (UNEX)

The NVMe Host Controller is highly flexible and configurable design targeted for both Enterprise and client class solutions that unlock the current and future potential of PCIe-based SSDs. The ...

93
High Performance DDR4/3 Memory Controller

Mobiveil's DDR4/3 Memory Controller is a highly flexible and configurable design targeted for high performance enterprise server and real-time consumer applications that utilize computational ...

94
Hyperbus Flash Memory Controller

Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count required to implement the memory subsystem should ...

95
HBM Gen2 Controller

96
DDR-I/II/III CONTROLLER IP CORE

DDRI/II/III Memory Controller Core implements an efficient and pipelined interface to DDR-I, DDRII and DDR-III SDRAM devices targeted for System-on-Chip (SoC) and FPGA platforms. The memory ...

97
QDR IV XP PHY + Memory Controller

Atria Logic with its vast expertise and working experience for more than a decade in memory domains, brings a high speed PHY and Memory Controller for next generation memories introduced under ...

98
SD 3.0 / SDIO 3.0 Combo Device Controller

The SD / SDIO 3.0 Combo Device Controller IP Core is compliant with the latest SD, SDIO standard and supports asynchronous interrupts to improve card performance. The SD / SDIO 3.0 Combo ...

99
AXI / AHB / APB - SPI Flash Memory Controller - Octal/Quad/Dual/Single SPI I/O - CPU access to Flash and optional Execute-in-Place (XIP), Boot, DMA

The Digital Blocks DB-SPI-FLASH-CTRL is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting access to Single/Dual/Quad SPI Flash Memory devices by way of Boot, Execute-in-Place ...

100
SDIO 3.0 Device Controller

The SDIO 3.0 Device Controller is fully compliant with the SD Specification Part E1 SDIO 3.0. The SDIO 3.0 Device IP is used to implement high-performance SDIO cards that connect to a Host processor ...

101
SD 3.0 / SDIO 3.0 / eMMC 5.0 Host Controller

The eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and I/O technologies: SD, SDIO and eMMC memory formats. This ...

102
SD 4.1 SDIO 4.1 Host Controller IP

The SD4.0/SDIO4.0/eMMC5.0 Host Controller IP is a highly integrated host controller IP solution that supports three key memory card I/O technologies: - SD4.0 - SDIO4.0 - eMMC5.0 ...

103
QSPI Controller with XIP

The QSPI-XIP core implements a quad Serial Peripheral Interface (SPI) module that either controls a serial data link as a master, or reacts to a serial data link as a slave. Users can configure ...

104
GDDR6 Memory Controller

OPENEDGESTM is the only total memory system IP company providing both memory controller and on-chip interconnect. OMC is the ORBITTM DDR Memory Controller, which delivers exceptional performance ...

105
eMMC 4.51 Device Controller

The eMMC 4.51 Memory controller is compliant with the latest MMC 4.51 specification released by JEDEC. The controller provides a peak bandwidth of 104MB/s and supports all of the security features ...

1 Testimonial
David Moloney, Chief Technology Officer at Movidia, Movidia

106
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS

Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core voltage of 1.1V and I/O voltage of 1.8/3.3V ...

107
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-EW

Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core voltage of 1.1V and I/O voltage of 1.8/3.3V ...

108
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 40LP-EW

Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core voltage of 1.1V and I/O voltage of 1.8/3.3V ...

109
SD UHSII Gen.2 PHY in SMIC 55nm LL

SLIPSDHU3AS55LL is a physical layer for SD UHS-II Gen.2 analog part. SLIPSDHU3AS55LL supports 390Mbps to 6.24Gbps data rate, and both Full Duplex/Half Duplex modes.

110
Memory controller (SDRAM or DDR SDRAM)

The logiMEM SDR/DDR SDRAM controller provides a powerful, yet simple-to-use interface between the industry standard memory devices and several processor or DMA devices which share the same physical ...

111
SD Card Host Controller

The logiSDHC is the Secure Digital (SD) card Host Controller IP core from the Xylon logicBRICKS IP core library. It is designed to transfer data from the system memory to the SD card's data ...

112
Universal Multiport Memory Controller - LPDDR 3/2 Controller

The UMMC Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption such as next-generation mobile, networking and consumer applications. ...

113
ONFI Flash Controller

Mobiveil’s Enterprise Flash Controller (EFC) is a highly flexible and configurable design targeted for enterprise storage applications like SSD. The EFC is used to access the external NAND ...

114
ONFI : Open NAND Flash Interface Host Controller

NAND Flash Interface controller that provides the means for a system to be designed that supports a range of NAND Flash devices without direct design pre-association. The solution also provides ...

115
SD Memory Card Host Controller

VinSDHC3_0 SD Host Controller Core controls data transfers between the SD Host System and the SD Memory Card sockets. It is compliant with the standard SD Controller Specification version 3.0. ...

116
AHB-Lite General Purpose Memory Module

The Roa Logic AHB-Lite Memory IP is a fully parameterized soft IP implementing on-chip memory for access by an AHB-Lite based Master. All signals defined in the AMBA 3 AHB-Lite v1.0 specifications ...

Try this IP for Free!

117
DO-254 AXI 7-Series DDRx (Limited) 1.00a

Maps AXI4 transactions coming from the MicroBlaze™ to the User Interface Block providing an industry-standard bus protocol interface to the memory controller. It enables the MicroBlaze™ ...

118
NVMe Target IP Core

The IntelliProp IPC-NV163-DT IP core is an industry standard NVMe target IP core that allows companies to build high speed NVMe based storage products. The IPC-NV163-DT provides a hardware accelerated ...

119
NVMe-to-NVMe Bridge

The IntelliProp NVMe Bridge utilizes the IntelliProp NVMe Host Accelerator Core and the IntelliProp NVMe Target Core to create an NVMe protocol bridge. The bridge is architected such that the ...

120

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