MIPI CSI Receiver
The MIPI Camera Serial Interface 2 (CSI-2) specification defines an interface between a peripheral device (camera) and a host processor (baseband, application engine). This interface is defined by MIPI consortium, which defines a series of modules in a MIPI compliant product.
Features
- Compliant with MIPI CSI-2 Spec v1.1 and MIPI D-PHY Spec v1.1
- Max 1.5 Gbps data transfer rate per Data Lane of DPHY
- Programmable 1, 2 or 4 Data Lane Configuration.
- Operate in continuous and non-continuous clock modes. Command and Video Mode are supported.
- Burst and Non-Burst modes are supported.
- Video Packet Formats:YUV-422 8-bit, RGB-888, RGB-565, RAW-8, RAW-10 and RAW-12
- Camera Interface: 8, 16 and 24 bpp
- Progressive Scanning
Deliverables
- RTL code
- Detailed design document
- Verification environment
- Test cases
- Synthesis environment/scripts
- Documentation
- Design Guide
- Synthesis guide
Block Diagram of the MIPI CSI Receiver

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