Movellus’ silicon-proven PLL generators plug right into our customers existing digital design flows, and delivers world class performing PLL IP in a matter of hours. The designs can be customized and re-verified in a matter of hours.
Movellus’ PLL generator is available in TSMC 28nm HPC and GF 14nm LPP process nodes. Several state of the art FinFET process nodes are currently being enabled for Movellus’ PLL generator.
- Integer, Fractional, Spread Spectrum
- Flexible architecture with integer-N, fractional-N & spread-spectrum clocking.
- Input, Output and Feedback Dividers
- Reference divider range: 1-512, Output divider range 1-512, Feedback divider range: 1-1024
- Dynamic Bandwidth & Fast Lock
- Dynamic loop filter for fast locking while maintaining excellent jitter performance in locked state. Bandwidth as high as Fref/15 and as low as ~10kHz.
- PLL Status & Control
- PLLs can be programmed through a parallel bus or a serial bus (e.g. AMBA). Lock status bit available.
- Ultra Low Voltage Operation
- Movellus PLLs do not depending on bias voltages and currents, and therefore are not headroom limited – resulting in low voltage operation of PLLs.