The DesignWare® SuperSpeed 3.1 USB IP solution is based on the USB 3.1 specification from the USB Implementer Forum. The comprehensive SuperSpeed USB IP offering consists of the device controller for integration into an SoC; verification IP (VIP) to verify the IP in the system environment; and drivers, as well as HAPS® FPGAbased prototyping systems and an IP Virtual Development Kit (VDK) for pre-silicon embedded software development. These elements enable quick development of advanced chip designs incorporating the new
10 Gbps SuperSpeed USB standard.
The DesignWare SuperSpeed 3.1 USB IP is targeted for integration into SoCs for media storage, creation, and playback devices, requiring faster bandwidth between PCs and portable electronic devices. Optimized for low power, the DesignWare SuperSpeed USB 3.1 Controllers allow designers to maximize power efficiency for extended battery life. The DesignWare SuperSpeed USB 3.1 Controller enables the fastest SuperSpeed USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a highperformance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.
- Supports SuperSpeed USB 3.1 at 10 Gbps, SuperSpeed USB 3.0 at 5 Gbps and High-Speed USB (USB 2.0)
- Optimized device controller IP designed to achieve lowest power and area for portable electronics
- SuperSpeed USB IP offering from the #1 provider of USB IP for twelve years in a row (Gartner 2013)
- Supports PIPE, UTMI+ and ULPI PHY interfaces
- Architectural features reduce power consumption
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to fine-tune performance/area trade-offs
- Lowers overall system power by design
- Supports SuperSpeed and High- Speed modes
- Migrate quickly from USB 3.0 to USB 3.1 by using existing USB 3.0 drivers
- Synopsys coreConsultant tool
- Verilog RTL source code
- ASIC and FPGA synthesis, ATPG, DFT, power scripts
- UVM Testbench with native SystemVerilog Verification IP for USB; Comprehensive databook and integration guides
- Reference drivers to speed development