The ISI-210 is a USB 2.0 OTG PHY Hard Macro Transceiver. It allows System On a Chip (SOC) designers to quickly integrate the transceiver into their chip. It fully supports USB 2.0, UTMI 1.05 and UTMI+. It is in volume production. It requires minimal number of external components. The core supports 8 bit parallel, 16 bit parallel and/or full/low speed serial data interfaces.
- Standard Digital CMOS Process Technology.
- Supports “High Speed” 480 Mb/s, 12Mb/s “full speed” and 1.5Mb/s “low speed” operation.
- USB Transceiver Macrocell Interface+ (UTMI+) Compliant
- Can be configured as Device/Host/OTG
- Design has been mapped into different process technologies.
- It is capable of transmitting and receiving at high, full and low speeds.
- On chip oscillator, termination resistor and DP/DM Short Circuit protection.
- On chip OTG comparators
- GDSII Layout Data Base
- Library Exchange Format (LEF) of the Macrocell.
- Encrypted Verilog model
- Synthesis Scripts and Timing Model File (.LIB)
- SOC Integration/Test Document