The PHY IP for USB 2.0 for TSMC 28HPC is engineered for quick and easy integration into any system on chip (SoC), and for seamless connection to a Cadence, or third party, UTMI-compliant controller. It provides a cost-effective, low-power solution for demanding applications, allowing devices to have small buffers even at high data rates. The USB 2.0 PHY supports efficient device connection for smaller data sets in applications ranging from Mobile and Consumer market, to Enterprise, Automotive and Internet of Things (IoT). The USB 2.0 PHY operates at High Speed (480Mbps), and Full Speed (12Mbps), and Low Speed (1.5Mbps).