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USB 3.0 femtoPHY, Type-C in TSMC (28nm, 16nm, 12nm)
The Synopsys DesignWare® USB 3.0 femtoPHY and DesignWare® USB-C 3.0 femtoPHY provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as digital cameras, networking and storage as well as next–generation feature-rich smartphones, tablets, digital TVs and media players requiring high throughput USB capability. Offering reduced silicon cost and longer battery life, the DesignWare USB-C/USB 3.0 femtoPHYs deliver 50% smaller die area and minimizes active and suspend power consumption.
The DesignWare USB-C/USB 3.0 femtoPHYs implement the latest USB Battery Charging and USB On-The-Go (OTG) specifications from the USB Implementer’s Forum (USB-IF).
Architected for the industry’s most advanced 1.8V process technologies, the USB-C/USB 3.0 femtoPHYs are designed to minimize effects due to variations in foundry process, device models, packages, and board parasitics.
The DesignWare USB-C/USB 3.0 femtoPHYs build on years of customer success with Synopsys’ silicon-proven USB PHY IP product line, which has been ported to over 100 process nodes and configuration combinations ranging from 180-nm to 14/16-nm FinFET. When combined with the DesignWare digital controllers and verification IP, the DesignWare USB-C/USB 3.0 femtoPHYs deliver a complete, low power and small die area solution for advanced system-on-chip (SoC) designs.
The DesignWare USB-C/USB 3.0 femtoPHYs implement the latest USB Battery Charging and USB On-The-Go (OTG) specifications from the USB Implementer’s Forum (USB-IF).
Architected for the industry’s most advanced 1.8V process technologies, the USB-C/USB 3.0 femtoPHYs are designed to minimize effects due to variations in foundry process, device models, packages, and board parasitics.
The DesignWare USB-C/USB 3.0 femtoPHYs build on years of customer success with Synopsys’ silicon-proven USB PHY IP product line, which has been ported to over 100 process nodes and configuration combinations ranging from 180-nm to 14/16-nm FinFET. When combined with the DesignWare digital controllers and verification IP, the DesignWare USB-C/USB 3.0 femtoPHYs deliver a complete, low power and small die area solution for advanced system-on-chip (SoC) designs.
Features
- 5 Gbps SuperSpeed data transmission rate through 3 meter USB 3.0 cable
- Integrated PHY includes transmitter, receiver, SSC generation, PLL, digital core, and ESD I/O pads
- Adaptive Rx equalization
- Programmable Spread Spectrum Clock (SSC) generation and absorption
- PIPE 3-compliant SuperSpeed USB 3.0 transceiver interface – Configurable PCS for 8-bit/500MHz, 16-bit/250MHz or 32-bit/125MHz operation
- Supports SuperSpeed power save modes U1, U2, and U3
- Supports all USB 3.0 test modes
- Designed for excellent performance margin and receiver sensitivity
- Robust PHY architecture tolerates wide process, voltage, and temperature variations
- Low-jitter PLL technology with excellent supply isolation
Benefits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- Supports SuperSpeed 5 Gbps data rate and is backward compatible with all USB 2.0 data rates including 480 Mbps (High-Speed), 12 Mbps (Full-Speed) and 1.5 Mbps (Low-Speed)
- Integrates high-speed, mixed-signal custom CMOS circuitry designed to PIPE3 and UTMI+ Level 3 specifications
- Can be used in USB Host, Device and Dual Role Port applications
- DesignWare USB-C 3.0 femtoPHY IP supports the USB Type-C connector standard
- Designed for easy integration with DesignWare USB 3.0 Controllers
Applications
- Laptops
- Tablets
- Mobile phones
- Storage
- Cameras
- DTVs
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