USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL

The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data transfers. A specific design for USB 3.1 type-C applications is the USB 3.1Type-C PHY IP. A separate PCS can be provided in addition to the USB 3.1 Type C PHY IP to fulfil the functions of various applications, including elastic buffer, scramble/de-scramble, data encoding/decoding, PRBS generation/checking, registers control, and testing. Depending on the needs of the customer, PCS is offered as a hard macro or a soft macro. The PCS standard will also be made available on its own. PHY functionality is verified by the NC-Verilog simulation tool using a test bench created in Verilog HDL..

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