The Power-On Reset (POR) circuit generates the logic-high output signals at the POR pin when the power supply voltage rises above a specified level ––Vrr. After the power drops below another specified level ––Vfr, this POR circuit generates the logic-low output signals at the same pin. A logic-low interval is generated at the rising edge of the power signal when the power supply voltage is lower than Vrr. During this interval, the logic elements can be initialized or reset to the initial states. An additional input, RES, can force the POR outputs to logic low after the outputs go high. This provides another way to reset the logic elements through the external control.
- No external components required
- Resetable via external control
- Supply glitch immunity
- Low quiescent current