D&R Slides

CUSTOMIZABLE SoC SPEAr® FROM STMicroelectronics SOLVING TIME ...	UML-based Design of a JPEG-LS IP via Axilica FalconML	uBIP: A Simplified Microcontroller Architecture for Education ...
A Set of VHDL IPs to Evaluate Performance of Netwoks-on-Chip	Stochastic Computation applied to the design of Error Correcting ...	In 2010, PCIe, SATA and USB IP Market will represent $200M
Platform Based Design using a design meta-database	Transactions in an OVM SystemVerilog Verification Environment ...	A 1-10Gbps SerDes IP in 65nm CMOS Technology
Semiconductor IP Quality – A User guide	A multi-purpose Digital Controlled Potentiometer IP-Core for ...	An UML-driven Interface Generation Approach for SoC Design with ...
Practical Design and Implementation of a Configurable DDR2 PHY ...	ipPROCESS: A Usage of an IP-core Development Process to Achieve ...	A Twenty-four Processors System on Chip FPGA Design

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