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AMBA AHB and APB Bus Monitor
Gaisler Research provides advanced AMBA bus monitoring functions that are used during the verification of the system. The functions check the AMBA Advanced High-performance Bus (AHB) and AMBA Advanced Peripheral Bus (APB) buses for illegal transactions that violate the applicable standard.
The bus monitor is fully compatible with the AMBA 2.0 specification and also implements checkers for some of the Frequently Asked Questions (FAQ) regarding the AMBA bus system.
The AMBA Bus Monitor allows separate enabling of checks for AMBA requirements and AMBA recommendations. AMBA requirement violations are reported as errors. AMBA recommendation violations are reported as warnings.
The AMBA Bus monitor allows individual rules to be disabled separately for AHB masters, AHB slaves and AHB arbiters. It also allows individual rules to be disabled separately for APB slaves.
The bus monitor is fully compatible with the AMBA 2.0 specification and also implements checkers for some of the Frequently Asked Questions (FAQ) regarding the AMBA bus system.
The AMBA Bus Monitor allows separate enabling of checks for AMBA requirements and AMBA recommendations. AMBA requirement violations are reported as errors. AMBA recommendation violations are reported as warnings.
The AMBA Bus monitor allows individual rules to be disabled separately for AHB masters, AHB slaves and AHB arbiters. It also allows individual rules to be disabled separately for APB slaves.
Features
- Compliant with the AMBA 2.0 specification
- Supports AMBA AHB and AMBA APB
- Supports all AMBA protocol transfer types and response types
- Checks for AMBA AHB and APB protocol violations
- 34 AHB rule checks
- 9 APB rule checks
- Written in VHDL for full support in common verification environments
Benefits
- Faster test bench development and more complete verification of digital designs
- Runs in every VHDL compatible simulation environment
- Fully integrated with Gaisler Research GRLIB VHDL IP-library, providing a complete AMBA based solution
- Compatible with the LEON3 32-bit SPARC processor
- Easy to instantiate and simulate
- Clear and precise error and warning messages
- Monitors constantly the AMBA buses during simulation, on-the-fly protocol checking
- Reduces the risk for design mistakes leading to silicon re-spin
Deliverables
- VHDL source code
- User Manual
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