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7 track Ultra High Density standard cell library at TSMC 40 nm
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AMBA AXI 4.0 Verification IP
The AXI 4.0 Verification IP Product is the Industry’s most comprehensive protocol validation solution for predictable verification of AMBA AXI 4.0 and AXI4.0-LITE based designs. AXI 4.0 VIP is reusable, highly configurable, pre-verified, plug-and-play verification component developed in System Verilog solution for SoC incorporating AXI4.0 component at Module, Chip and System level.
Features
- AMBA AXI OVM Class based VIP is a readymade highly configurable System Verilog Verification Component suitable for verification of AMBA AXI master and slave DUT. The AXI SV VIP provides all necessary building blocks to easily test master/slave DUT with the AXI protocol. The Verification Component can be easily configured and integrated with the verification environment.
- Supports File size and Incremental burst
- Support for aligned and multiple transfer
- Fully compliant to Methodology: UVM, OVM and VMM
- Hook-ups for end-to-end score boarding
- User and Response Signalling support
Benefits
- AXI4 is an AMBA-based protocol designed specifically for high bandwidth and low latency performance. It is majorly deployed as a system interface in a majority of networking, storage, computing, consumer and IoT applications.
Deliverables
- SystemVerilog Source Code
- Sanity Testcases
- Examples of Topological Usage
- Sample Verification Environment
- User Guide and Release Notes
- Test Plan + Coverage Plan [Upon Request]
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