Truechip's CPRI verification IP provides an effective and efficient way to verify the components interfacing with CPRI interface of an IP and SOC.
Truechip's CPRI VIP is fully compliant with CPRI alliance specification for CPRI version v6.1 with backward compatibility to previous versions.
The VIP is light weight with easy plug-and-play interface so that there is no hit on the design cycle time.
- Compatible with CPRI specification v6.1 and its previous versions.
- Supports following line bit rates of CPRI specification
- 614.4 Mbit/s, 1228.8 Mbit/s, 3072.0 Mbit/s, 4915.3 Mbit/s, 6144.0 Mbit/s, 9830.4 Mbit/s, 8110.08 Mbit/s, 10137.6 Mbit/s, 12165.12Mbit/s
- Supports 8B/10B line coding and scrambling/de‐scrambling.
- Supports 64B/66B line coding and scrambling/de‐scrambling.
- Supports both PHY (Layer 1) and Data Link Layer (Layer 2).
- Supports all three SAPs at Layer 2 ‐ Control & Management, Sync and User Plane.
- Supports Fast C&M channel based on Ethernet for each line bit rate.
- Supports 100BASE‐X PCS for Ethernet channel.
- Support slow C&M channel based on HDLC with following bit rates
- 240 kbit/s, 480 kbit/s, 960 kbit/s, 1920 kbit/s, 2400 kbit/s, HDLC bit rate negotiation on higher layer
- Supports L1 inband protocol.
- Performs L1 synchronizations and rate negotiation
- 11 Supports protocol version negotiation.
- 12 Supports C&M channel rate negotiation.
- Supports interface for vendor specific information.
- Supports Passive link (no C&M channel proposed).
- Supports L1 Inband alarm indications and their detection including LOS, LOF, RAI and SDI.
- Supports different IQ data sampling widths
- Downlink ‐> 8, 9, 10.....20 bits
- Uplink ‐> 4, 5, 6....... 20 bits
- Supports different oversampling ratios
- Downlink ‐> 1, 2
- Uplink ‐> 2, 4
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and cover points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- CPRI nodes
- EC (Radio equipment control) Node R
- RE (Radio Equipment) Node
- CPRI Monitor
- Testbench Configurations
- Test Suite (Available in Source code)
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Assertions & Coverage Tests
Block Diagram of the CPRI Verification IP Verification IP