Truechip’s NVM Express 1.3c Verification IP provides an effective & efficient way to verify the high performance queuing interface and command set optimized for PCIe based SSD’s.
Truechip’s NVM EXPRESS VIP is fully compliant with standard NVM EXPRESS specifications Rev1.3c. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.
- Compliant with NVMe specification Rev1.2, Rev1.2.1, Rev1.3, Rev1.3c and fully compatible with PCIe specification rev2.0, rev3.0, rev4.0.
- Fully categorized test plan for all kinds of NVMe commands.
- Supports fused operation.
- Supports the on the fly queue creation and deletion.
- Supports for NVMe subsystem Reset.
- Supports for PRP and SGL for data transfer.
- Supports for queue priority.
- Supports for all mandatory commands.
- Configurable number of outstanding Abort and Asynchronous commands.
- Supports for multiple Namespaces.
- Truechip proprietary Address mapping for SSD address mapping.
- Both AXI bus and Truechip proprietary bus for transferring data to SSD are supported.
- Supports for Host Memory Buffer feature with configurable host memory size and number of host.
- All Directive command with both Identify and Stream Directive types are supported with configurable number of stream resources.
- Supports for Sanitize command.
- Supports for Telemetry.
- APB Support to configure DUT registers.
- Supports for Virtualization with configurable number of controller on virtual function.
- Supports for Metadata Handling.
- End-to-end data protection (T10 DIF and DIX compatible).
- Security send and receive command supported.
- Firmware update and activation.
- Supports for Autonomous power management.
- Robust error reporting.
- Interrupt coalescing configuration control.
- Capability discovery and configuration.
- Up to 64K I/O queues each with up to 64K entries.
- Fixed size 64B submission commands and 16B completions enable fast and efficient command decode and execution.
- Supports advanced SystemVerilog features like constrained random testing.
- Supports dynamically configurable modes.
- Strong Protocol Monitor with real time exhaustive programmable checks.
- Supports Dynamic as well as Static Error Injection scenarios.
- On the fly protocol checking using protocol check functions, static and dynamic assertion.
- Built in Coverage analysis.
- Provides a comprehensive user API (callbacks) in Monitor, controller and Memory Model BFMs.
- Graphical analyser to show transactions for easy debugging
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
- NVM EXPRESS Host/ NVMe Controller
- NVM EXPRESS Monitor and Scoreboard
- Test Environment & Test Suite :
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Assertions & Coverage Tests
- Compliance Tests
- Integration Guide, User Manual and Release Notes
Block Diagram of the NVM NVM Express 1.3c Verification IPVerification IP