Questa Verification IP Family for USB supports USB3.2 USB3.1, USB3.0, USB2,USB Type C, and eUSB interfaces along with all supported speeds to provide a complete verification solution for designs containing USB interfaces. Built upon native System Verilog and UVM, QVIP Family for USB provides bus functional models (BFM) with complete functionality on the latest specification for all USB use models. QVIP Family for USB comes with support for all kinds packets/stimulus over the USB interface, ensuring extensive coverage of verification scenarios and exhaustive checking with built-in assertion checks. Architected for ease-of-use, QVIP is easy to integrate in all test benches in minimal time, quickly enabling productive verification. QVIP is integrated with all Siemens EDA functional verification tools and enables verification on all platforms, ensuring fast and complete verification closure. QVIP supports all major simulators (Questa Sim, VCS, and Incisive) and methodologies (UVM). The QVIP Family for USB can be used in various configurations on different speeds for verification of USB Hubs and Devices over serial and parallel interfaces, supporting the latest USB specifications and drafts .
The USB QVIP family enables verification of the following interfaces in various use models:
- USB2- UTMI,ULPI, eUSB, HSIC and USB2 interface
- USB3: USB3.0, USB3.1, USB 3.2 and SSIC
- USB PD: TypeC and TypeC port controller interface