English
Single Port, Ultra Low Power, Low Voltage, GF 22FDX, Single Port Compiler
You are here:
USB 3.0 OVM/UVM Host Verification IP
Test and Verification Solutions offers an USB 3.0 OVM/UVM HOST VIP as part of its asureVIP™ series of offerings. This is a highly flexible and configurable verification IP, which can be easily integrated into any SOC verification environment or Block level verification environment.
The TVS OVM/UVM based USB3.0 Host VIP supports both USB3.0 and USB2.0 functionalities. It has been entirely programmed in System Verilog and it provides support for OVM, UVM based testbenches.
The VIP comes with a protocol BUS Monitor which checks for non-compliance with USB3.0/2.0 protocol violations these are reported by monitors connected to PIPE and UTMI.
USB 3.0 VIP supports Bulk, Control, Isochronous and Interrupt transfers. It supports SuperSpeed (SS), High Speed (HS), Full Speed (FS) and Low Speed (LS) which enables engineers to verify speed negotiation between SS, and 2.0 FS, HS, LS.
The TVS OVM/UVM based USB3.0 Host VIP supports both USB3.0 and USB2.0 functionalities. It has been entirely programmed in System Verilog and it provides support for OVM, UVM based testbenches.
The VIP comes with a protocol BUS Monitor which checks for non-compliance with USB3.0/2.0 protocol violations these are reported by monitors connected to PIPE and UTMI.
USB 3.0 VIP supports Bulk, Control, Isochronous and Interrupt transfers. It supports SuperSpeed (SS), High Speed (HS), Full Speed (FS) and Low Speed (LS) which enables engineers to verify speed negotiation between SS, and 2.0 FS, HS, LS.
Features
- PHYSICAL LAYER
- USB 2.0 and USB 3.0 PHY Layer Supported
- LINK LAYER
- Full LTSSM Support (PIPE Interface)
- Ordered Sets Support
- Cable Unplug & Re-plug Scenarios
- Auto Speed change detection (HS/FS/SS)
- Power management Suspend & Resume
- Support Low Power State (U1,U2,U3)
- PROTOCOL LAYER
- The protocol based test category verifies the packet fields for different types of USB packet transfers
- Transfer level tests include control read and write for two and three stage transfers, bulk IN and OUT transfers, ISO IN and OUT transfers and the Interrupt IN and OUT
- Data Bursting
- SS Bulk Stream
- LMP, LPM and ITP Generation
- Flow Control support (ACK/RETRY/NUMP/NRDY…)
- OTHER FEATURES
- Error Injection capability in all Layers
- Functional Coverage
- Extensive Call Backs & Messaging
- USB 3.0 Superspeed Host VIP is being validated against Silicon Proven USB 3.0 Device RTL
Benefits
- Highly Flexible, Independent and Configurable USB 3.0 Host VIP
- Proven against Silicon Proven VIP
- Less TAT in integrating into SOC Verification environments
Deliverables
- USB 2.0/3.0 Host Controller OVM/UVM VIP
- UTMI Monitor, PIPE Monitor
- Fast BUS Monitor/Driver (AXI BUS) – DATA
- Slow BUS Monitor/Driver (APB Bus) - CONFIG
- Test Suite, User Guide
Block Diagram of the USB 3.0 OVM/UVM Host Verification IP
View USB 3.0 OVM/UVM Host Verification IP full description to...
- see the entire USB 3.0 OVM/UVM Host Verification IP datasheet
- get in contact with USB 3.0 OVM/UVM Host Verification IP Supplier