V-By-One HS is the serial communication protocol developed by Thine Electronics, Inc to support the higher frame rates and the higher resolutions required by advancing FPD technologies. V-By-One HS VIP can be used to verify transmitter or Receiver device following the V-By-One HS basic protocol as defined in V-By-One HS.
V-By-One HS VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA and non-standard verification env
- Follows V-By-One HS specification as defined in V-By-One HS version 1.2
- Support transmitter and Receiver Mode
- Supports upto 32 serial lanes
- Supports lane skew insertion in transmitter mode
- Supports disparity and invalid code insertion in 8b/10b
- Supports scrambler as in V-By-One HS specification
- Support on the fly generation of data.
- Detects and reports the following errors.
- Invalid control character
- Supports constraints Randomization.
- Built in functional coverage analysis.
- Callbacks in Transmitter and Receiver for various events.
- Faster testbench development and more complete verification of V-By-One HS designs.
- Easy to use command interface simplifies testbench control and configuration of slave and master.
- Simplifies results analysis.
- Runs in every major simulation environment.
- Complete regression suite containing all the V-By-One HS testcases.
- Examples's showing how to connect various components, and usage of Transmitter, Receiver and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation contains User's Guide and Release notes.