The Simulation VIP is ready-made for your environment, providing consistent results whether you are using Cadence Incisive®, Synopsys VCS®, or Mentor Questa® simulators. You have the freedom to build your testbench using any of these verification languages: SystemVerilog, e, Verilog, VHDL, or C/C++. Cadence Simulation VIP supports the Universal Verification Methodology (UVM) as well as legacy methodologies.
- Cadence 802.11 Wireless MAC VIP is compliant with specification version 802.11 n/ac. 802.11 n/ac WLAN
- Support for the header formation for MAC protocol data unit (MPDU), FCS calculation, and validation
- Provides Full Stack verification
- Includes Basic Test Suite
- Contention based channel access mechanism for QoS Network configuration
- The basic medium access protocol that allows automatic medium sharing b/w compatible PHYs through the use of CSMA/CA and random back off time after a busy medium
- Includes multiple access categories, through TXOP operation
- Part of Robust Security Network Association (RSNA). This feature is used for Individually Addressed Data and Management Frames. It also provides data confidentiality, authentication, integrity, and replay protection.
- BIP provides data integrity and replay protection for group addressed robust management frames
- An MSDU or an MMPDU is partitioned into smaller MAC level frames. The fragmentation creates MPDUs smaller than the original MSDU or MMPDU length to increase reliability by increasing the probability of successful transmission of the MSDU or MMPDU