By Kathryn Kranen, CEO
Jasper Design Automation
Post-silicon debug and verification is often kept hush-hush , despite the huge impact and urgency of this aspect of SoC development. As EE Times mentioned as early as 2007 ?post-silicon debugging is a dirty little secret that can cost $15 to $20 million and take six months to complete.? Time spent on post-silicon verification represents hidden waste, and may consume 35% of total project time.
Only the largest, best managed (and perhaps bravest) companies plan proactively for post-silicon debug. The key is identifying new solutions to support collaboration between the lab and designers. These solutions must be effective for both large companies with dedicated silicon verification groups; and companies where tapeouts are fewer and the project team alone hits the hot seat at silicon bring-up.
This session reviews the current methodologies for silicon debug and verification with a detailed look at formal verification technology, one new approach for solving these too-often unspoken and urgent scenarios.
* R. Goering, ?Post-Silicon Debugging Worth a Second Look?, EETimes, Feb. 05, 2007.
Kathryn Kranen is responsible for leading Jasper’s team in successfully bringing the company’s pioneering technology to the mainstream design verification market. She has 20 years EDA industry experience and a proven management track record. While serving as president and CEO of Verisity Design, Inc., US headquarters of Verisity Ltd., Kathryn and the team she built created an entirely new market in design verification. (Verisity later became a public company, and was the top-performing IPO of 2001.) Prior to Verisity, Kathryn was vice president of North American sales at Quickturn Systems. She started her career as a design engineer at Rockwell International, and later joined Daisy Systems, an early EDA company. Kathryn graduated Summa cum Laude from Texas A&M University with a B.S. in Electrical Engineering. Kathryn is serving her fifth term on the EDA Consortium board of directors, and was elected its vice chairperson. In 2005, Kathryn was recipient of the prestigious Marie R. Pistilli Women in Electronic Design Automation (EDA) Achievement Award.