Breakthrough Performance and Integration
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FinFET with 3D IC for breakthrough density, bandwidth, and massive inter-die connectivity for virtual monolithic design
Up to 38 TOPs (22 TeraMACs) of DSP compute performance are optimized for fixed and floating point compute including INT8 for AI inference
Up to 128 transceivers on a device – backplane, chip-to-optics, and chip-to-chip capable
Gen3 x16 Integrated PCIe® block for 100G applications
DDR4 support of up to 2,666Mb/s, up to 500Mb of on-chip memory caches for increased efficiency and low latency
150G Interlaken, 100G Ethernet MAC cores for high speed connectivity
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Data centers need to be workload optimized to dynamically change the throughput, latency, and power requirements from a wide range of virtualized software applications. Virtex UltraScale+ FPGAs serve as a scalable, reconfigurable acceleration platform that can be optimized for complex workloads. Massive amounts of raw compute capability and I/O flexibility in Virtex UltraScale+ FPGAs are suited for compute-intensive workloads in data center applications.
Flexible hardware acceleration, low latency operation, high-speed switching capability are critical in 5G baseband. Virtex UltraScale FPGAs offers dynamic and scalable solutions for evolving 5G infrastructure.
Up to 128 power-optimized high-speed transceivers and Nx100G networking cores enables 1Tb line card implementation in a small footprint. Integrated 100G Ethernet MAC with FEC and OTN modes provides a flexible interface to coherent optics to design robust systems.
The combination of beamforming and other radar functions results in enormous signal processing requirements and precision tracking and/or guidance in a spectrum contested environment. Virtex UltraScale+ FPGAs allow the RADAR designers not have to choose between performance and SWaP-C. Virtex UltraScale+ FPGAs are capable of delivering higher performance by enhanced DSP resources, on-chip memories, and high degrees of interconnectivity. Unlike general-purpose processors, FPGAs can be reprogrammed to change both waveforms and algorithms for more parallel processing.
With massive DSP bandwidth and high transceiver count, Virtex UltraScale+ FPGAs offer high-performance data handling and analysis for network/protocol analyzers, signal generators, and wired communication testers. Massive on-chip embedded memory are ideal for data staging and coefficient tables & FIFOs.
XCVU3P | XCVU5P | XCVU7P | XCVU9P | XCVU11P | XCVU13P | |
System Logic Cells (K) | 862 | 1,314 | 1,724 | 2,586 | 2,835 | 3,780 |
DSP Slices | 2,280 | 3,474 | 4,560 | 6,840 | 9,216 | 12,288 |
Memory (Mb) | 115.3 | 168.2 | 230.6 | 345.9 | 341 | 455 |
GTY/GTM Transceivers (32.75/58 Gb/s) | 40/0 | 80/0 | 80/0 | 120/0 | 96/0 | 128/0 |
I/O | 520 | 832 | 832 | 832 | 624 | 832 |
Video tutorials guide the user through the steps to compile, modify, build, and debug AMD FPGAs
AMD hands-on FPGA and Embedded SoC design training provides you the knowledge to begin designing right away
AMD delivers the most dynamic processing technology in the industry, enabling rapid innovation with its adaptable, intelligent computing
AMD provides comprehensive tools and utilities to maximize productivity of your design
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