- Via ROM 48KByte IP/Compiler on SMIC 130LL (Oct. 16, 2014)
- ADC + DAC - TowerJazz 0.18u (Oct. 06, 2014)
- Reed Solomon Decoder and Encoder (soft input, hard output) (Oct. 03, 2014)
- USI-T (Oct. 03, 2014)
- ADC & PLL & Video DAC at SMIC 90nm LL process (Sep. 29, 2014)
- NFC tag IP (Sep. 10, 2014)
Open-Silicon today announced a comprehensive Hybrid Memory Cube (HMC) 2.0 controller solution as licensable Intellectual Property (IP) that will enable ...
Intel Corporation today unveiled silicon characterization results for its 1 to 32 Gbps high-speed SerDes on the 14nm process. This 32 Gbps SerDes is the ...
The ZigBee® Alliance today announced the unification of its market-leading wireless standards to a single standard named ZigBee 3.0. This standard will ...
Altera and IBM today unveiled the industry’s first FPGA-based acceleration platform that coherently connects an FPGA to a POWER8 CPU leveraging IBM’s ...
Is the Market ready to conquer PCIe 4.0 challenges ?
A Method to Quickly Assess the Analog Front-End Performance in Communication SoCs
I-fuse OTP - The OTP of Choice
Using sub-gigahertz wireless for long range Internet of Things connectivity
Silicon platform optimization: A top-down methodology
Reaping the benefits of architectural modeling in embedded design
USB battery charging rev. 1.2: Important role of charger detectors
Designing for the Future: The I6400 MIPS CPU Core
VideosIrrationality for the Semiconductor Industry
Michel Depeyrot, CEO, Dolphin Integration