Mobiveil Announces Major Customer Design Win With a Multinational Telecommunications Company for Its RapidIO 10xN (Gen3) Digital Controller IP
Arteris today announced that AppliedMicro, also known as Applied Micro Circuits Corporation, has selected Arteris® FlexNoC® for use in its X-Gene™ Server ...
Intilop delivers their Enhanced 10G bit 16K concurrent-TCP-session Hardware Accelerator Pre-Ported and tested on Altera and Xilinx FPGAs. This subsystem ...
TVS is offering the AMBA 5 CHI (Coherent Hub Interface) which is a highly flexible and configurable verification IP that can be easily integrated into ...
Synopsys today announced the availability of the first products in the new DesignWare® EV Family of vision processors. The EV52 and EV54 vision processors ...
MorethanIP Completes Interoperability Testing using Semtech’s PHY Connected to their Ethernet 10/25/40/50/100 Gigabit PCS (Physical Coding Sub-Layer) ...
Digital Core Design introduced the DQ8051 IP Core. DCD’s new extremely-fast 8051 MCU Core boasts a Dhrystone 2.1 performance rating of 0.27292 DMIPS/MHz, ...
Laxman Sahoo, Arrow Devices
Virtual Prototyping Platform with Flash Memory
Open Silicon Inc.
Analysis of RDC Paths for a million gate SoC
Building a high-performance, low-power audio/voice subsystem
5 Steps to Securing the IoT
When Your Embedded Processor Runs Out of Steam, Try Parallelism
Improving analog design verification using UVM
Test and Verification Solutions
Selecting an Optimized ADC for a Wireless AFE
LTE-A Release 12 transmitter architecture: analog integration