- 55nm USB PHY 2/3 lightning connector support (Feb. 27, 2015)
- MIMO OFDM base-band processor (Feb. 25, 2015)
- PCIe Gen1+ (3Gb/s+) (Feb. 25, 2015)
- DDR3 controller (Feb. 24, 2015)
- OTP High Density Memory Array (Feb. 13, 2015)
- 10 bit ADC @ 2MHz, 10 bit DAC @ 2MHz, 60dB PGA (Jan. 30, 2015)
MediaTek, today announced the launch of MediaTek Ventures - a new strategic investment arm within the company. Headquartered in Hsinchu, Taiwan, MediaTek ...
ViaSat has expanded its capabilities in high-speed, low-power secure space-based ASIC and FPGA microprocessor design with the acquisition of the product ...
Vivante welcomes today's Khronos Group's announcement at GDC of the new Vulkan open standard API—an innovative, ground-up design that will unleash the ...
Imagination Technologies announces a new area-optimized PowerVR GPU designed to drive high-quality graphics with full OpenGL ES 3.0 functionality into ...
PLDA has added Analog Bits, the semiconductor industry’s leading provider of mixed-signal IP, to its ecosystem of PHY partners. Together, the partners ...
Barun Kumar De, SmartPlay Technologies
Tony Massimini, Semico
Kurt Shuler, Arteris
Interconnect (NoC) verification in SoC design
Bluetooth Developer? Why Reinvent the Wireless Radio... Use the CORDIO BT4 Radio IP
Dual edge sequential architecture capable of eliminating complete hold requirement from the test path
BER test method uses real data
Wireless communication standards for the Internet of Things
The future of custom ASICs
Internet of Things - Opportunities for device differentiation
Transitioning to Advanced Verification Techniques for FPGAs - Catch-22?