IP2000 to show off latest in silicon IP next March

IP2000 to show off latest in silicon IP next March
By Michael Santarini, EE Times
November 29, 1999 (9:24 a.m. EST)
URL: http://www.eetimes.com/story/OEG19991129S0007

The fourth annual conference on silicon intellectual property, the IP2000 Conference and Exhibition, will take place here at the Santa Clara Convention Center Monday through Wednesday, March 20-22, according to Miller Freeman U.K. Ltd. Miller Freeman is the parent company of EE Times.

The organizers of the IP99 show said the conference saw a 125 percent growth in attendees over the previous year, and they expect to see a similar increase for IP2000.

The growth is an indicator that "IP is a reality, but it is yet to be seen how far SoC [system-on-chip] will permeate the semiconductor industry," said Luke Collins, IP conference program coordinator and publisher of EE Times sister publication Electronics Times. "IP2000 will focus on the systems in systems on chip."

On the first day of the conference, the program will feature a business track organized by EE Times and Electronics Times, while the second and third days will concentra te on technical issues, with a roster of keynote speakers, focused sessions, tutorials and panels.

Conference officials have issued a call for papers. Interested parties should prepare a 200-word abstract for a 25-minute presentation. Abstracts are due to Tony Hennie (thennie@unmf.com) by Dec. 1.

One of the events at the show will be the second annual SOC Design Contest, co-sponsored by Virage Logic. Designers whose systems feature a creative use of embedded memory are invited to enter.

The finalists will present their designs during a conference panel as well as display them throughout the show at the Virage booth. The results of the contest will be announced at the Virage booth on Wednesday, March 22, at 12:45 p.m., said conference officials. The entry deadline for the contest is Tuesday, Feb. 15, 2000. For more information and the entry form, visit www.viragelogic.com after Dec. 1.

Pre-registration for IP2000 is $395 for one day, $650 for two days and $725 for three days. To register, visit www.ip2000.com. Show sponsors include EE Times, Electronics Times, Communications Systems Design, Embedded Systems Programming, Integrated Systems Design and the Virtual Socket Interface Alliance.

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Aldec Inc., a vendor of hardware-description language design entry and verification tools for programmable logic designers, announced that design services provider and core vendor Alatek Inc. has joined the Aldec IP Partner Program. According to Aldec, the partnership will bring streamlined implementations of Alatek IP cores into Aldec's Active-HDL environment.

Alatek-which offers synthesizable microprocessors, PC peripherals, bus interfaces and free simulation models-will provide precompiled, ready-to-use libraries to allow its cores to be used in the Active-HDL environment.

In addition, Alatek will deliver to the companies' mutual customers application notes and technical tip s on core implementation and usage with Aldec simulators. Visit www.aldec.com or www.alatek.com.