IP Cores, Inc. Announces a New Compact Version of the Elliptic Curve Crypto Accelerator

IP Cores, Inc. announces a new version of the ECC1 Elliptic Curve Cryptography (ECC) accelerator with very low gate count, high performance, and low power consumption

Palo Alto, California, April 15th, 2009 -- IP Cores, Inc. has announced availability of a new version of the ECC1 elliptic curve acceleration IP core. Elliptic Point Cryptography (ECC) is widely used in secure communication devices, smart cards, RFID and medical applications.  

"Our new ECC accelerator design combines extremely low resources – at less than 10 thousand ASIC gates , ECC1 is smaller than any other ECC core on the market – and high throughput at 5,000 point multiplications per second," said Dmitri Varsanofiev, CTO of IP Cores. "It is well known that the basic operation of ECC is not covered by any active patent. During the implementation, we carefully avoided all patented “optimizations” and produced a patent-free core for our customers."

Elliptic Curve Cryptography
 
Elliptic curve cryptography (ECC) is an approach to public-key cryptography based on the algebraic structure of elliptic curves over finite fields. The use of elliptic curves in cryptography was suggested independently by Neal Koblitz and Victor S. Miller in 1985. U.S. National Security Agency has endorsed ECC technology by including it in its Suite B set of recommended algorithms and allows their use for protecting information classified up to top secret with 384-bit keys.
 
ECC1 Core
 
Implementation of the ECC in hardware has few important advantages over the software-only solutions. For smaller CPUs of the battery-powered devices hardware improves both the user experience and the battery life, allowing a typical Diffie-Hellman public key exchange to be completed in few milliseconds. Due to its extremely small size (ECC1 occupies area of just 0.026 square mm in the 90 nm process) – and matching low power consumption –  hardware ECC implementation enables standard public key cryptography on smart cards and RFID devices. Furthermore, a proper hardware implementation due to its inherent high throughput can avoid the optimized implementation techniques and thus be unencumbered by the patents.    
 
IP Cores, Inc. had designed the ECC1 core that implements the necessary crypto functionality of the ECC algorithm (point multiplication and point verification functionality) and weighs in at less than 10,000 ASIC gates, 630 slices on Xilinx Virtex-5 devices, 2065 LE in Altera Cyclone II, 1137 ALUT in Altera Stratix II, and 7790 tiles for Actel ProASIC3. The throughput of ECC1 reaches 5,000 point multiplies per second. ECC1 datasheet is available on the IP Cores, Inc. Web site at www.ipcores.com/images/ECC1core.pdf .
 For more information about IP Cores’ product line, please visit www.ipcores.com .

About IP Cores, Inc.

IP Cores is a rapidly growing company in the field of security and DSP IP cores. Founded 4 years ago, the company provides IP cores for communications and  storage fields, including AES-based ECB/CBC/OCB/CFB, AES-GCM and AES-XTS cores, flow-through AES/CCM cores with header parsing for IEEE 802.11 (WiFi), 802.16e (WiMAX), 802.15.3 (MBOA), 802.15.4 (Zigbee), public-key accelerators for RSA and elliptic curve cryptography (ECC), cryptographically secure pseudo-random number generators (CS PRNG), lossless data compression cores as well as low-latency fixed and floating-point FFT, IFFT, and Viterbi detector cores.