Axis Systems Introduces World's Most Efficient Verification System, Enabling Platform Verification for Vertical Markets

For world's most complex system-on-chip designs, Xtreme-II simulates, accelerates, and emulates up to 100 million gates, offers more than two gigabytes of memory, and runs at up to 1 MHz

New verification system delivers highest capacity, highest density, and lowest cost per gate

Sunnyvale, CA - May 13, 2002 - Axis Systems, Inc. today announced the world's most efficient verification system, Xtreme-II, which simultaneously simulates, accelerates, and emulates system-on-chip designs containing up to 100 million application-specific integrated circuit (ASIC) gates.

Xtreme-II ushers in a new order for verifying today's most complex electronic designs: Platform Verification, an integrated functional verification environment supporting all levels of abstraction concurrently throughout the entire design flow. With Platform Verification, designers can, for the first time, simultaneously simulate, accelerate, and emulate their systems on a chip (SoCs).

By having access to a complete verification suite in a single, unified environment, designers can better meet the challenges of larger and more complex designs, shorter schedules, and shrinking resources.

"Verifying complex designs consumes up to 70 percent of product design time," said Mike Tsai, Axis president and CEO. "We developed Xtreme-II to reduce that percentage so companies have more time to create differentiated products. Xtreme-II is designed to meet the new challenges of today's platform-based design methodologies."

Key features and benefits of Xtreme-II include:

• The event-driven ReConfigurable Computing (RCC) engine, the most efficient architecture in the world, enables advanced debugging capabilities.
• Dynamic event processing techniques, when combined with RCC, efficiently harness the power of the largest commercially available FPGAs, resulting in the highest capacity, highest density, and lowest cost per gate.
• Simultaneous verification, with one system for simulation, acceleration, and emulation, deliver the maximum designer productivity.
• Abstraction binding enables model reuse and avoids costly model translations.

Event-driven RCC enables advanced debugging
Axis' patented, event-driven ReConfigurable Computing (RCC) technology is the enabler for powerful, friendly debugging capabilities such as VCD-on-Demand and hot swapping. VCD-on-Demand saves the simulation history for an entire design, eliminating the need to re-simulate when a bug is found, which improves overall verification productivity. Hot swapping - switching from software simulation to accelerated simulation and emulation - gives designers the flexibility to debug their designs in a familiar software debugging environment while taking advantage of acceleration and emulation performance.

 Dynamic event processing brings highest capacity, highest density, and lowest cost per gate
Combining RCC technology and Axis' proprietary dynamic event processing (DEP) techniques, Xtreme-II efficiently harness the power of the largest commercially available FPGAs. RCC with DEP results in the highest capacity, highest density, and lowest cost per gate in the industry.

Communication efficiency between computational elements is derived from DEP, a technique that significantly reduces communication overhead and improves average runtime performance. Only the active events to be communicated and processed are transmitted, in contrast to other signaling techniques such as crossbar and time-division multiplexing, which assume that all signals in a design require updating at every evaluation period.

Xtreme-II has the highest capacity of any event-driven verification system on the market - up to 50 million gates per chassis, expandable to 100 million gates in a twin-box configuration. It contains more than two gigabytes of memory so designers can load their most demanding memory-intensive applications. And with a runtime speed of up to 1 MHz, designers can complete their verification runs faster than ever.

Xtreme-II's efficiency comes not only from its capacity and speed, but also from its density. Packed with the world's largest commercially available, reconfigurable field-programmable gate arrays (FPGAs), Xtreme-II is more than 20 times denser than other emulation systems. Its density is more than 16,000 gates per cubic inch, which is why Xtreme-II fits in a chassis as small as a typical industry-standard server-class workstation.

 "The higher efficiency translates to lowering cost per gate, higher quality and more reliable system for our end users," said Michael Young, Axis' product marketing director for Xtreme-II.

 Simultaneous verification eliminates the verification gap
Xtreme-II is a unified verification environment for simulation, acceleration, and emulation, giving designers maximum productivity possible during verification.

Most of today's verification environments are patched together with several standalone, incompatible tools and methodologies. Typically, design teams have a software simulator from one supplier, an accelerator from another supplier, and an emulator from yet a third supplier.

"All these various tools create an enormous gap in the verification flow, where models cannot be shared, several different verification databases must be maintained, and designers cannot easily transition from one tool to another," added Young. "Designer productivity suffers in such an environment, costs soar, design flaws are harder to find, and the risk of missing schedules increases."

Xtreme-II removes the gap by providing consistency and predictability in the verification environment. Using the Xtreme-II system, designers can simultaneously simulate, accelerate, and emulate complex SoCs.

Abstraction binding enables model reuse and avoids costly model translations.
Traditional verification systems have a distinct division between simulation and emulation, which dictates that the abstraction levels are different in each world, with the only area of overlap occurring at the RTL level. In those systems, a gate-level model can only be used with a gate-level simulator or accelerator, and an RTL model can only be used with RTL tools.

In contrast, Xtreme II and platform verification support "abstraction binding," which is the ability to reuse models at any level of abstraction - behavioral, register-transfer (RTL), gate, and discrete hardware model components - throughout the verification process, whether designers are in simulation, acceleration, or emulation mode or any combination of modes. Abstraction binding leads to high gains in productivity, since designers don't have to rebuild or translate their models for different abstraction levels.

 "Creating models is a time-consuming and tedious process," added Young, "and very risky. New, untested models may be incompatible with the existing ones, or may not function correctly. With Xtreme-II, designers can leverage their existing models from any abstraction level.

Availability
Xtreme-II will be available in limited production quantities in the U.S. at the end of Q2 2002.

About Axis Systems
Axis Systems, Inc. offers high-performance verification platforms for the hardware and software development of complex electronic system and system-on-chip designs. Axis' products help customers increase confidence in new designs, improve overall verification productivity and shorten time to market. On a single platform and with one design database, patented RCC technology provides software simulation, accelerated simulation, system emulation and hardware/software co-verification. Customers include the world's leading networking and multimedia companies. Axis is headquartered at 209 Java Drive, Sunnyvale, CA 94089. To learn more about Axis, visit  www.axiscorp.com. 

### Contacts
Axis Systems - Michael Young, (408) 588-2000 x120, myoung@axiscorp.com
Cayenne Communication - Lois DuBois, (650) 854-5485, lois.dubois@cayennecom.com