SandCraft claims to be shipping fastest 64-bit MIPS processors at 600 MHZ

SandCraft claims to be shipping fastest 64-bit MIPS processors at 600 MHZ
By Semiconductor Business News
February 11, 2002 (3:01 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020211S0060

SANTA CLARA, Calif. -- SandCraft Inc. today announced it has begun production shipments of the industry's highest performance MIPS64 64-bit processors, which operate at 600 MHz.

The SR71000 and SR71010 microprocessors are based on a 64-bit RISC architecture from MIPS Technologies Inc., in nearby Mountain View, and produced by silicon foundry United Microelectronics Corp. (UMC) in Taiwan on a 0.15-micron copper process. SandCraft said it is offering 500-, 550-, and 600-MHz speed grades, and more than a dozen companies are now evaluating the 64-bit processors.

SandCraft said prime applications for the embedded dual-issue superscalar processors are in networking and imaging systems.

In qualifying the new processors for production, SandCraft has validated the higher clock frequencies, larger cache, and improved L3 cache performance, said Paul Vroomen, president and CEO of the company. In the qualification process, SandCraft has become confi dent that a follow-on 0.13-micron processor will hit a target of 800 MHz, Vroomen added.

The company is offering a complete support toolkit for the SR71000 and the SR71010, priced at $4,999.

The SR710X0 can issue and execute up to six instructions per clock cycle in a pipeline that uses out-of-order issue and dispatch and in-order retirement. It has a two-way superscalar architecture incorporating dual-instruction fetch, dual dispatch and dual commit, which enables the processor to maintain a throughput of two instructions per cycle. The processor has a nine-stage superscalar pipeline for high clock frequency with a pipeline-bypass architecture optimized for minimizing instruction-independent stalls, SandCraft said.

The SR71000 optimizes system performance and reduces system cost with integrated on-chip memory, including 32 kilobytes each of primary instruction and primary data cache and 512 Kbytes of unified secondary cache. The SR71010 adds tertiary cache control, including on-chip tertiary cac he tags that can support up to 16 megabytes of external tertiary cache using commodity SRAMs.