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Dolphin Design unveils the final piece of their platform offer with BAT, an audio solution ...
To meet the future market requirements, Dolphin Design has developed a high-performance, energy efficient audio platform, called BAT, which can provide ... Read
Creonic joins partnership with the University of Bremen to expand the development of Artificial ...
Together with 5 other partners, including Nokia, research is being conducted into radio communications with artificial intelligence. The project is called ... Read
Allegro DVT, the worldwide leading provider of video semiconductor IP solutions, today announced that Ingenic Semiconductor, one of the leading system-on-chip ... Read
Partner Highlight
Global Semiconductor Sales Increase 5.8 Percent Year-to-Year in May; Annual Sales Projected ...
The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors were $35.0 billion in May 2020, an increase of 5.8 percent ... Read
Innosilicon IP helps Ingenic T20 win "China Chip" Excellent Market Performance Product Award ...
Ingenic T20 intelligent video processor chip won the 14th "China Chip" Excellent Market Performance Product Award in the field of security in addition ... Read
intoPIX is excited to announce that Appear TV, a leading provider of next-generation video processing platforms for broadcast and streaming has integrated ... Read
Industry Expert Blogs
SemiWiki Jay Goldberg, Semiwiki
Moortec Blog Richard McPartland, Technical Marketing Manager, Moortec
UltraSoC Blog Chris Wade, UltraSoC
UltraSoC Blog David Marsden, UltraSoC
Industry Articles
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Why VAD and what solution to choose?
Baptiste Tournoud
Dolphin Design -
Why a True Hardware PUF is more Reliable as RoT
Evans Yang
PUFsecurity -
Antenna Effect in 16nm Technology Node
Upma Pawan Kumar
einfochips (An Arrow Company) -
Analog and Power Management Trends in ASIC and SoC Designs
Luis Tellez
Vidatronic, Inc. -
Where Innovation Is Happening in Geolocation. Part 1: Signal Processing
Rabih Chrabieh
Nestwave -
The Quantum Tunneling Mechanism of NeoPUF
Charles Hsu
PUFsecurity -
GRSCRUB: FPGA Configuration Supervisor
Ádria Barros de Oliveira
Cobham Gaisler AB -
Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR
Julian Jenkins
Perceptia Devices
