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Wolley Inc.
CXL Controller IP
Movellus, Inc.
On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry
Terminus Circuits Pvt Ltd.
10G Base T Ethernet PHY
Crypto Quantique
Logic based Hardware Root-of-Trust - Physical Unclonable Function (PUF)
Synopsys, Inc.
LPDDR5X/5/4X PHY IP on TSMC N3P

Blogs

What is the Right Metric to Understand 5G Processing Throughput? Well, it's not Peak Speed....
AccelerComm Limited
Barry Graham, Chief Marketing Officer
AccelerComm Limited
Enhancing Edge AI with the Newest Class of Processor: Tensilica NeuroEdge 130 AICP
Cadence Design Systems, Inc.
SriramK
Cadence Design Systems, Inc.
Synopsys Interconnect IPs Enabling Scalable Compute Clusters
Synopsys, Inc.
Neeraj Paliwal
Synopsys, Inc.
Rapid eFPGA Configurator
Rapid Silicon
Bhavin Shah, SVP of Engineering & Product
Rapid Silicon
Bringing Silicon Agility to Life with eFPGA and Intel's 18A Technology
QuickLogic Corp.
Brian Faith
QuickLogic Corp.
UCIe Full SI Analysis Flow with Compliance Check for Heterogeneous Integration
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Alphawave Semi and Arm Accelerate Scalable Computing with CSA-Compliant Chiplets
Alphawave Semi
Shivi Arora, Director , ASIC IP Solutions, and Sue Hung Fung, Principal Product Marketing Manager,
Alphawave Semi
Siemens Cre8Ventures Partners with Xiphera to Strengthen Automotive Security and Support EU Chips Act Sovereignty Goals
Siemens - Tessent Embedded Analytics
Siemens - Tessent Embedded Analytics
How Edge AI is Redefining Data-driven Decision Making in Industrial Automation
MosChip Technologies, USA
Darshil Shah
MosChip Technologies, USA
Understanding Lifecycle Management for Secure Embedded Systems
Secure-IC
Secure-IC
Ethernet Evolution: Trends, Challenges, and the Future of Interoperability
Ethernet Evolution: Trends, Challenges, and the Future of Interoperability
Synopsys, Inc.
Synopsys, Inc.

Articles

Boosting RISC-V SoC performance for AI and ML applications
Arteris IP
Andy Nightingale
Arteris IP
MIPI in FPGAs for mobile-influenced devices
Enabling the next generation of smart glasses
GlobalFoundries
Optimizing 16-Bit Unsigned Multipliers with Reversible Logic Gates for an Enhanced Performance
Automating Hardware-Software Consistency in Complex SoCs
How NoC architecture solves MCU design challenges
Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
How to Design Secure SoCs: Essential Security Features for Digital Designers
System level on-chip monitoring and analytics with Tessent Embedded Analytics
What tamper detection IP brings to SoC designs
RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Understanding MACsec and Its Integration
Asic Technology
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Today on Design And Reuse

bullet_arrow  BrainChip CTO to Present on Architectural Innovation for Low-Power AI at the Embedded Vision Summit - May 21, 2025

bullet_arrow  Cost-Optimized PolarFire® Core FPGAs and SoCs from Microchip Technology Deliver High Performance with a 30% Lower Price Tag - May 21, 2025

bullet_arrow  Expedera’s Origin Evolution NPU IP Brings Generative AI to Edge Devices - May 21, 2025

bullet_arrow  Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA - May 21, 2025

bullet_arrow  NVIDIA Unveils NVLink Fusion for Industry to Build Semi-Custom AI Infrastructure With NVIDIA Partner Ecosystem - May 20, 2025

bullet_arrow  sureCore extends its sureFIT design service to include custom memory solutions for AI applications - May 20, 2025

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Design IP

bullet_arrow  BrainChip CTO to Present on Architectural Innovation for Low-Power AI at the Embedded Vision Summit - May 21, 2025

May. 21, 2025 – LAGUNA HILLS, Calif.-- May 20, 2025 -- BrainChip Holdings Ltd (ASX: BRN, OTCQX: BRCHF, ADR: BCHPY), the world’s

bullet_arrow  Expedera’s Origin Evolution NPU IP Brings Generative AI to Edge Devices - May 21, 2025

May. 21, 2025, May. 21, 2025 –  Expedera launches its Origin Evolution NPU IP, bringing hardware acceleration to meet the c

bullet_arrow  Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA - May 21, 2025

May. 21, 2025 – Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASI
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FPGA

bullet_arrow  Cost-Optimized PolarFire® Core FPGAs and SoCs from Microchip Technology Deliver High Performance with a 30% Lower Price Tag - May 21, 2025

May. 21, 2025 – PolarFire Core devices streamline costs while retaining the market-leading power efficiency, security and reliabi
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Embedded Processing

bullet_arrow  NVIDIA Unveils NVLink Fusion for Industry to Build Semi-Custom AI Infrastructure With NVIDIA Partner Ecosystem - May 20, 2025

May. 20, 2025 –  MediaTek, Marvell, Alchip Technologies, Astera Labs, Synopsys and Cadence to Create Custom AI Silicon With

bullet_arrow  Quantum Computing Roadmaps: A Look at The Maps And Predictions of Major Quantum Players - May 16, 2025

thequantuminsider.com, May. 16, 2025 – Quantum computing, a field leveraging quantum mechanics to perform computations beyond cla

bullet_arrow  Keysight Quantum Control System Embedded within Fujitsu and RIKEN’s World-Leading 256-Qubit Quantum Computer - May 15, 2025

SANTA ROSA, Calif., May. 15, 2025 – Keysight Technologies, Inc. (NYSE: KEYS), announced that its Quantum Control System (QCS) has
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Security

bullet_arrow  Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems - May 19, 2025

May. 19, 2025 – May 19, 2025 - Secure-IC is excited to exhibit at Computex 2025 (booth #1225), Asia’s premier technology ev
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RISC-V

bullet_arrow  RISC-V Technology Seeing Growing Maturity and Penetration - May 19, 2025

eetasia.com, May. 19, 2025 – At last month’s Andes Technology RISC-V Con event in San Jose, CA, the company announced a num

bullet_arrow  Parallel AI RISC-V compiler enters alpha testing - May 14, 2025

eenewseurope.com, May. 14, 2025 – Flow Computing in Finland has started alpha testing of a RISC-V compiler for its Parallel Proce

bullet_arrow  RISC-V International Promotes Andrea Gallo to CEO - May 13, 2025

May. 13, 2025, May. 13, 2025 – May 13, 2025 -- RISC-V International announces Andrea Gallo as the organization’s new CEO, e
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Design Platform

bullet_arrow  Siemens to bring advanced timing constraint capabilities to EDA design flow with Excellicon acquisition - May 19, 2025

May. 19, 2025 – Acquisition enables System-on-a-Chip (SoC) designers to accelerate design closure and enhance functional and structura

bullet_arrow  Perforce Partners with Siemens for Software-Defined, AI-Powered, Silicon-Enabled Design - May 16, 2025

May. 16, 2025 – Partnership to Unify Software and Semiconductor Development  MINNEAPOLIS, May 15, 2025 — Perforce So

bullet_arrow  Siemens leverages AI to close industry's IC verification productivity gap in new Questa One smart verification solution - May 14, 2025

May. 14, 2025 –  Questa One redefines integrated circuit (IC) verification from a reactive process into an intelligent, self-optimizi
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Business

bullet_arrow  TSMC Board of Directors Meeting Resolutions - May 16, 2025

May. 16, 2025 – HSINCHU, Taiwan, R.O.C., May 13, 2025 – The TSMC (TWSE: 2330, NYSE: TSM) Board of Directors today held a meeting

bullet_arrow  Arm Evolves Compute Platform Naming for the AI Era - May 16, 2025

May. 16, 2025 – By Rene Haas, CEO, Arm The future of AI compute is being built on Arm. AI continues to transform ever

bullet_arrow  Arteris Announces Financial Results for the First Quarter and Estimated Second Quarter and Updated Full Year 2025 Guidance - May 15, 2025

May. 15, 2025 – CAMPBELL, Calif., May 13, 2025  -- Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates
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Automotive

bullet_arrow  Automotive Industry Charts New Course with RISC-V - May 16, 2025

eetimes.com, May. 16, 2025 – The European automotive industry, historically characterized by long development cycles and a comple

bullet_arrow  Arteris Q1 2025 presentation highlights 28% revenue growth, strategic automotive wins - May 13, 2025

www.investing.com, May. 13, 2025 – Introduction & Market Context Arteris Inc. (NASDAQ:AIP), a provider of system-on-chi

bullet_arrow  Samsung's 12nm-class Automotive LPDDR5X: DRAM for safety-critical centralized automotive systems - May 12, 2025

Today, the automotive industry is on the cusp of a major electrical and electronic (E/E) architecture change. What is driving this change? Simply put,
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Foundry

bullet_arrow  Samsung Reportedly Revises High-NA EUV Plans: Limited Memory Use, Foundry Begins at 1.4nm - May 16, 2025

trendforce.com, May. 16, 2025 – According to South Korean media outlet The Bell, Samsung Electronics and SK hynix are reportedly

bullet_arrow  Synopsys ramps up collaboration with Taiwan's TSMC on A16 process - May 14, 2025

Electronic design firm Synopsys announced Wednesday it has expanded its strategic partnership with TSMC, enabling optimized design work on its latest

bullet_arrow  SMIC Q2 revenues to take 6% hit due to tool maintenance and validation issues - May 13, 2025

SMIC has had trouble with yields and output which will reduce this quarter's revenues by 6%, reports DigiTimes.www.electronicsweekly.com, May
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eFPGA

bullet_arrow  Secafy Licenses Menta's eFPGA IP to Power Chiplet-Based Secure Semiconductor Designs - May 15, 2025

May. 15, 2025 – Hardware adaptability enables Secafy Co, Ltd. to be prone for side channel attack and offers a path for future algorit
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Chiplet / Multi-Die

bullet_arrow  Putting UCIe in Context - May 15, 2025

electronicdesign.com, May. 15, 2025 – Synopsys’ Mick Posner talks about the Universal Chiplet Interconnect Express and its

bullet_arrow  Rambus Delivers Industry-Leading Client Chipsets for Next-Generation AI PC Memory Modules - May 14, 2025

Introduces industry-leading LPDDR5 CAMM2 PMIC and DDR5 Gen 2 Client PMIC alongside Client Clock Driver and SPD Hub for high-performance notebooks, de
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Networking

bullet_arrow  5G-OT Alliance launched to bring 5G/LTE to OT environments - May 14, 2025

Industry leaders have established the 5G Operational Technology Alliance (5G-OT Alliance), a network owner-led initiative aimed at enhancing the secur

bullet_arrow  Historic Quantum Technology Agreement Signed by EU, Japan - May 13, 2025

$4M research project targets quantum hardware, software, HPC integration and AI-enhanced quantum applicationswww.iotworldtoday.com/, May. 13, 202
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Artificial Intelligence

bullet_arrow  See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit - May 13, 2025

May. 13, 2025 – Burlingame, CA – May 13, 2025 – Quadric® today announced that it will showcase its ChimeraTM general-p

bullet_arrow  ComputeRAM in AI accelerators: An LLM case study - May 13, 2025

synthara.ai, May. 13, 2025 –  In the rapidly evolving landscape of AI data centers, system designers face two critical challenge

bullet_arrow  Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design - May 12, 2025

May. 12, 2025 – SANTA CLARA, Calif.— May 7, 2025 - At its annual flagship user event, CadenceLIVE Silicon Valley 2025, Cadence (
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Audio / Video

bullet_arrow  VESA Releases Compliance Test Specification Model for DisplayPort Automotive Extensions Standard - May 9, 2025

May. 09, 2025 – New software model and FPGA validation platforms, which are designed to accelerate implementation of new standard in a

bullet_arrow  Xylon Introduces Xylon ISP Studio - May 8, 2025

Xylon ISP Studio is a powerful PC-based tool designed to simplify and accelerate HDR Image Signal Processing (ISP) pipeline development and tuning on

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