Design & Reuse
Partner Highlight

New Products

Menta
Soft IP - The Only eFPGA Soft IP
SKAIChips
PVT Sensor(SF 4nm, LN04LPP)
Wolley Inc.
PCIe Controller IP
Chips&Media, Inc.
Specialized video processing NPU for SR, NR, Demosaic New!
IQonIC Works
MCU Platform for Industrial Applications

Blogs

How to design secure SoCs Part IV: Runtime Integrity Protection
KiviCore
KiviCore
From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems
Chip Interfaces ApS
Piotr Koziuk
Chip Interfaces ApS
Cadence Welcomes VLAB Works
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Cadence Launches Cache-Coherent HiFi 5s SMP for Next-Gen Audio Applications
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Why Hardware Security Is Just as Critical as Software Security in Modern Systems
Synopsys, Inc.
Vincent van der Leest, Mike Borza
Synopsys, Inc.
How Arasan's SoundWire PHY Can Elevate Your Next Audio SoC
Arasan Chip Systems Inc.
Arasan Chip Systems Inc.
PCIe 6.x and 112 Gbps Ethernet: Synopsys and TeraSignal Achieve Optical Interconnect Breakthroughs
Synopsys, Inc.
Magaly Sandoval-Pichardo
Synopsys, Inc.
BLACKBOX AI: Dissecting the AI Network Traffic
Keysight Technologies
Sulagna Adhikary, R&D
Keysight Technologies
Powering the Future of RF: Falcomm and GlobalFoundries at IMS 2025
GlobalFoundries
Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry's Transformation to Software-Defined Vehicles
Synopsys, Inc.
Synopsys, Inc.
Arm Zena CSS - Accelerating Chiplet-Based SoC Design for AI-Defined Vehicles
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Introducing Agile Analog's New CEO
Agile Analog
Krishna Anne, CEO
Agile Analog

Articles

RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator
By Mr. Shailesh Vasekar (Senior Consultant at VeriFast Technologies)
Transition Fixes in 3nm Multi-Voltage SoC Design
eInfochips, Inc.
Rahul Parmar and Mayursinh Vansadiya
eInfochips, Inc.
Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
Innosilicon Technology Ltd
Innosilicon Technology Ltd
Nine Compelling Reasons Why Menta eFPGA Is Essential for Achieving True Crypto Agility in Your ASIC or SoC
Menta
Menta
Menta
How to design secure SoCs, Part III: Secure Boot
KiviCore
Kivicore
KiviCore
Automating NoC Design to Tackle Rising SoC Complexity
Arteris IP
Andy Nightingale
Arteris IP
One Platform, Five Libraries: Certus Semiconductor's I/O IP Portfolio for Every Application on TSMC 22nm ULL/ULP Technologies
Certus Semiconductor
Certus Semiconductor
Fault Management and Design-for-Test Strategies in Network Chip Architectures
Choosing the Right RFIC Design Partner
asicNorth
AsicNorth
asicNorth
Boosting RISC-V SoC performance for AI and ML applications
Arteris IP
Andy Nightingale
Arteris IP
MIPI in FPGAs for mobile-influenced devices
Enabling the next generation of smart glasses
GlobalFoundries
Asic Technology
Select your target foundry and technology
Today on Design And Reuse

bullet_arrow  Ceva Launches MotionEngine™ Hex: Bringing Precise, Touch-Free, Spatial Control to Smart TV, Gaming, and IoT Interfaces - June 24, 2025

bullet_arrow  Creonic's DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard - June 24, 2025

bullet_arrow  Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC’s 22nm Platform - June 24, 2025

bullet_arrow  Mirabilis Design Signs OEM Agreement with Cadence to Deliver VisualSim for System-Level Modeling and Performance Optimization - June 23, 2025

bullet_arrow  BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology - June 23, 2025

bullet_arrow  Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets - June 23, 2025

Partner Highlight
Latest News Alerts