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New Products

FortifyIQ, Inc.
FortifyIQ Secure SCA/FI protected Chiplet RoT with Post-Quantum Security (SCA/DPA/FIA resistant)
Mobiveil Inc.
50G PON LDPC
Chip Interfaces ApS
JESD204E - Early adopters version
Microservice Store
Embedded Microservice Runtime
Dolphin Semiconductor
Digital audio PDM-to-PCM converter with 117 dB Dynamic Range and Dual-phase alignment

Blogs

Five Reasons You Should Start Your Chip Design with IDesignSpec
Agnisys, Inc.
Anupam Bakshi
Agnisys, Inc.
UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
Chip Interfaces ApS
Piotr Koziuk
Chip Interfaces ApS
Sensor fusion in action: How cameras and LiDAR integrate with radar for safer driving
Yuichi Motohashi
GlobalFoundries
Simulation as a Safety Backbone for Embodied AI in Autonomous Driving
Vayavya Labs
Raviraj Inchal, Lead Engineer
Vayavya Labs
The Rise of Physical AI: When Intelligence Enters the Real World
Ceva, Inc.
Navot Goren
Ceva, Inc.
2026 Predictions: System-Level Design, AI-Native Workflows, and the Rise of Multi-Die Compute Fabrics
Arteris
Arteris
Visualizing Cross-Die Paths in Multi-Die Designs
Synopsys, Inc.
Anshul Chawla
Synopsys, Inc.
2026 Outlook with Krishna Anne of Agile Analog
Agile Analog
Daniel Nenni
Agile Analog
Why PUF Is the Missing Piece of Zero-Trust Device Security
ICTK
ICTK
Europol: Prioritizing PQC Migration in Financial Services
PQShield
PQShield
Physical AI Moves Center Stage: Why Data Center Investments Are Enabling Real-World Robotics
Mike Hogan, Chief Business Officer
GlobalFoundries
CES 2026: Where Edge AI, Embedded Security and One Highly Secure and Very Smart Robotic Dog Stole the Show
Kudelski Labs
Nicole Kostopoulos
Kudelski Labs

Articles

PUF-PQC Integrated with PUFrt to Solve PPA Challenge for SoCs
eMemory Technology Inc.
eMemory & PUFsecurity
eMemory Technology Inc.
From Silos to Systems, from Data to Insight
Security certification and the crucial role of anti-tamper sensor solutions
Agile Analog
Chris Morrison
Agile Analog
Beyond the Core: Tackling system-wide debugging for complex SoCs with Tessent UltraSight
Siemens EDA
Francisca Tan, Senior Product Manager
Siemens EDA
Three Ethernet Design Challenges in Industrial Automation
Key ASIC
Key ASIC
ST silicon photonics and BiCMOS technologies: the winning portfolio for AI optical interconnects
STMicroelectronics
STMicroelectronics
AI in VLSI Physical Design: Opportunities and Challenges
Japesh Kumar, Qualcomm
AI-Driven and Traditional Approaches to Accident Scenario Reconstruction
Vayavya Labs
Nitin Swamy
Vayavya Labs
From Theory to the Field: Why Side-Channel Protection Defines Post-Quantum Security
PQSecure Technologies
PQSecure Technologies
PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions
Innosilicon Technology Ltd
Innosilicon Technology Ltd
Design Approaches and Architectures of RISC-V SoCs
Maven Silicon
Maven Silicon
Implementation of Metal ECO using Mask Programmable Cell for Hold Timing Violations
eInfochips, Inc.
Dhanyakumar Shah,Dharmik Lakhani
eInfochips, Inc.
Asic Technology
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FPGA and eFPGA Corner
Select your target vendor and device
Today on Design And Reuse

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