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New Products

Alphacore, Inc.
5 GHz 150 fs jitter Phase Locked Loop (PLL) IP Block GlobalFoundries 22nm
Agnisys, Inc.
Network on Chip (NoC)
CAST
JPEG-E-XL JPEG XL Encoder
Arasan Chip Systems Inc.
Arasan xSPI + eMMC Combo PHY IP
Weebit Nano
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (1Mb)

Blogs

Synopsys Delivers First Complete UFS 5.0 and M‑PHY v6.0 IP Solution for Next‑Gen Storage
Synopsys, Inc.
LJ Chen
Synopsys, Inc.
Flexible Ethernet IP Licensing for Secure, Scalable Silicon Development
Comcores
Comcores
Transforming the Automotive Experience with Cadence Tensilica DSPs
Cadence Design Systems, Inc.
SriramK
Cadence Design Systems, Inc.
Accelerating Multi-Die Innovation: How Synopsys and Samsung are Shaping Chip Design
Synopsys, Inc.
Amlendu Shekhar Choubey
Synopsys, Inc.
Accelerating Chiplet Innovation with a New Partner Ecosystem
Cadence Design Systems, Inc.
Mick Posner
Cadence Design Systems, Inc.
From Fab to the Field: Accelerating Trusted U.S. Semiconductor Onshoring for Mission-Critical Defense
GlobalFoundries
IC Manufacturing and Packaging: The Engine Powering the Digital and AI World
Maven Silicon
P R Sivakumar
Maven Silicon
Working in electronics engineering
Agile Analog
Harith Haboubi
Agile Analog
Intelligently Assembling SoCs the Agnisys Way
Agnisys, Inc.
Anupam Bakshi
Agnisys, Inc.
Akida Pico: The Tiny Brain Making “Always-On” AI a Reality
BrainChip Inc.
Bridging the Gap to Chiplet Interoperability
Arteris
Andy Nightingale
Arteris
Rambus Announces Industry-Leading Ultra Ethernet Security IP Solutions for AI and HPC
Rambus, Inc.
Rambus, Inc.

Articles

Securing UALink: Introducing Synopsys UALinkSec_200 Security Module
Synopsys, Inc.
Dana Neustadter, Vincent van der Leest
Synopsys, Inc.
Creating a Frequency Plan for a System using a PLL
Perceptia Devices
Julian Jenkins
Perceptia Devices
PUF-PQC Integrated with PUFrt to Solve PPA Challenge for SoCs
eMemory Technology Inc.
eMemory & PUFsecurity
eMemory Technology Inc.
From Silos to Systems, from Data to Insight
Keysight Technologies
Keysight Technologies
Security certification and the crucial role of anti-tamper sensor solutions
Agile Analog
Chris Morrison
Agile Analog
Beyond the Core: Tackling system-wide debugging for complex SoCs with Tessent UltraSight
Siemens EDA
Francisca Tan, Senior Product Manager
Siemens EDA
Three Ethernet Design Challenges in Industrial Automation
Key ASIC
Key ASIC
ST silicon photonics and BiCMOS technologies: the winning portfolio for AI optical interconnects
STMicroelectronics
STMicroelectronics
AI in VLSI Physical Design: Opportunities and Challenges
Japesh Kumar, Qualcomm
AI-Driven and Traditional Approaches to Accident Scenario Reconstruction
Vayavya Labs
Nitin Swamy
Vayavya Labs
From Theory to the Field: Why Side-Channel Protection Defines Post-Quantum Security
PQSecure Technologies
PQSecure Technologies
PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions
Innosilicon Technology Ltd
Innosilicon Technology Ltd
Asic Technology
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FPGA and eFPGA Corner
Select your target vendor and device
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