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Cadence Tapes Out 32GT/s UCIe IP Subsystem on Samsung 4nm Technology
Mayank Bhatnagar
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Advancing Technology Nodes: The Era of Divergent Scaling
Raghuveer Reddy
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Powering the Physical AI Era: How GlobalFoundries Enables Real-Time Machines That Sense, Think, Act, and Communicate
Ed Kaste, SVP of Ultra-Low Power CMOS Business
GlobalFoundries
Compartmentalisation by Microservices
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Stellar P3E, 1st automotive MCU with an Neural-ART and the beginning of the democratization of AI in cars
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Silicon as strategy: the hidden battleground of the new space race
Elad Baram
Ceva, Inc.
DEEPX, Rambus, and Samsung Foundry Collaborate to Enable Efficient Edge Inferencing Applications
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An Effective SRAM Repair Strategy Based on eMemory NeoFuse OTP and Siemens Tessent™ MemoryBIST
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Transforming Chaos Into Clarity: Keysight Data Management for the AI Era
María Castillo
Keysight Technologies
Five Reasons You Should Start Your Chip Design with IDesignSpec
Anupam Bakshi
Agnisys, Inc.
UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
Piotr Koziuk
Chip Interfaces ApS
Sensor fusion in action: How cameras and LiDAR integrate with radar for safer driving
Yuichi Motohashi
GlobalFoundries
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Securing UALink: Introducing Synopsys UALinkSec_200 Security Module
Dana Neustadter, Vincent van der Leest
Synopsys, Inc.
Creating a Frequency Plan for a System using a PLL
Julian Jenkins
Perceptia Devices
PUF-PQC Integrated with PUFrt to Solve PPA Challenge for SoCs
eMemory & PUFsecurity
eMemory Technology Inc.
From Silos to Systems, from Data to Insight
Keysight Technologies
Security certification and the crucial role of anti-tamper sensor solutions
Chris Morrison
Agile Analog
Beyond the Core: Tackling system-wide debugging for complex SoCs with Tessent UltraSight
Francisca Tan, Senior Product Manager
Siemens EDA
Three Ethernet Design Challenges in Industrial Automation
Key ASIC
ST silicon photonics and BiCMOS technologies: the winning portfolio for AI optical interconnects
STMicroelectronics
AI in VLSI Physical Design: Opportunities and Challenges
Japesh Kumar, Qualcomm
AI-Driven and Traditional Approaches to Accident Scenario Reconstruction
Nitin Swamy
Vayavya Labs
From Theory to the Field: Why Side-Channel Protection Defines Post-Quantum Security
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PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions
Innosilicon Technology Ltd
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Today on Design And Reuse
Chiplet Summit Announces 2026 Best of Show Award Winners
- February 19, 2026
India Budget 2026-2027: Semiconductors, Manufacturing, and Tax Reforms
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- April 23
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- September 16
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Chiplet / Multi-Die
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Automotive
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Artificial Intelligence
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Design IP
TES Launches its µEngine: Parallel CPU System for Deterministic Real-Time HDL Applications
- February 16, 2026
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- February 16, 2026
We CAN! Now in XL
- February 12, 2026
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Networking
Fraunhofer IPMS develops new 10G TSN endpoint IP Core for deterministic high-speed Ethernet networks
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RISC-V
RISC-V Pivots from Academia to Industrial Heavyweight
- February 16, 2026
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Green Electronics
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D&R Events
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IP-SoC South Korea 25
- September 16
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, 2025
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