Intel revises processor cores to boost speed, shrink die

Intel revises processor cores to boost speed, shrink die
By Mark Hachman, EBN
June 20, 2000 (10:50 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000620S0008

Intel Corp. has undertaken a sweeping revision of its microprocessor cores to bump up clock speeds while trimming the die size by 5% to 9%.

According to a summary of product change notifications that Intel is supplying to its customers, "small-cache" Pentium III Xeons, Pentium III desktop microprocessors, and mobile Pentium III and Celeron microprocessors are transitioning from a so-called "B-0" to "C-0" stepping. OEMs suspect that the desktop Celeron is also affected, given that the die is essentially the same size as the Pentium III.

Technically, the change appears to be relatively minor. However, the revision will probably improve Intel's manufacturing yields and clock speeds, a boon to OEMs trying to keep pace with systems designed with chips from Advanced Micro Devices Inc. In fact, OEM sources believed that the Celeron's die size, if affected by the core revision, would become smaller than that of the Duron, AMD's rival processor for low-e nd PCs.

A spokesman for Intel, Santa Clara, Calif., declined to comment on or confirm the new stepping, but added that "new steppings are a normal part of the semiconductor manufacturing process."

In a note attached to a product change notification, the company said that Pentium III processors manufactured on 0.18-micron linewidths and shipping in an SECC2 package will be changed "to improve product performance and allow the introduction of higher processor frequencies." The changes include a new CPU ID number, the correction of errata, and a 5% die shrink. In desktop microprocessors, the new core stepping will be specific to the Pentium III in the SECC or "slot" package.

The new core revision may result in fewer 866-MHz Pentium III chips at the 133-MHz front-side bus speed, although it isn't clear whether the shortages will be restricted to sample quantities. Samples of all of the new cores in Xeon to mobile processors will begin around July 5. "Samples will be limited to higher frequencies only ," the Intel document stated. "To validate lower frequencies, customers are requested to down-clock samples to lower frequencies facilitating validation of systems at the lower frequencies. There will be a limited amount of 866/133 available."

The new core will affect only those Xeon processors shipped in the 733- to 933-MHz clock speed range. Intel is only revising the core used with the "small cache" versions that integrate 256 Kbytes of level-2 cache. The new processors will be available in September, according to Intel's documentation.

The Pentium III and Celeron mobile processor die shrink is more pronounced, at about 9%, from 104 sq. mm to 95 sq. mm. Intel has not disclosed a sampling date for the new chips, although volume production will apparently begin in late October. The core revision will affect chips shipped with Intel's microBGA and microPGA packages, as well as its mobile modules.

As with all of its core revisions, Intel is encouraging OEMs to validate the new core revisions on st andard operating systems.