BOPS Announces Manta, the Highest-performance Programmable DSP Chip Available for Internet, Multimedia and Wireless CommunicationsApplications Development Business Editors/Technology Writers

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--June 12, 2000-- Manta(tm) operates at 24 bops with 1.3 GFLOP performance and integrates BOPS(R) ManArray(tm) cores on a programmable single chip.

Chip was developed with standard ASIC methodology in 3 1/2 Months Manta chips, synthesizable ManArray cores, software development kits,evaluation boards and BOPS Xemulator(tm) boards are available now

Billions of Operations per Second (BOPS) Inc., a leading programmable DSP core provider, today announced the immediate availability of its 24 billions of operations per second (bops) Manta Digital Signal Processor (DSP) chip. Manta is used to develop high-performance DSP applications that use the BOPS ManArray programmable DSP core family.The Manta DSP chip integrates the BOPS 2040XL(tm) DSP core with PCI,SDRAM and MIPS(R) SysA/D bus I/O. At 150MHz, the Manta chip providesindustry-leading 24 bops and 1.3 GFLOP performance in a single DSP chip.Carl Schlachte, BOPS CEO and chairman, noted, "Our goal is to help ourcustomers develop the highest-performance programmable DSP applicationswith the best support and tools available. Our Manta chip proves ourcores deliver on performance and is part of our strategy to offercustomers the best support and tools available for their productdevelopment."

What's New and Different

BOPS' Manta chip is the first public demonstration of the integration of BOPS' ManArray architecture with its' highest-performance, scaleable andreusable programmable DSP cores into an SOC.The Manta SOC enables, in a single chip, OEM's to immediately evaluateany one of BOPS nine DSP cores: the BOPS 2010FX(tm), 2010FL(tm),2010XL(tm), 2020FX(tm), 2020FL(tm), 2020XL(tm), 2040FX(tm), 2040FL(tm)and 2040XL. All the BOPS cores are instruction set architecture (ISA)and software development tool compatible."The Manta chip allows customers to quickly evaluate the ManArrayarchitecture and develop high-performance programmable DSP SOCs that arefoundry independent," noted Rick Kepple, BOPS VP sales and marketing."Since we are a DSP IP company, we provide the Manta chip as anevaluation platform, so that we do not compete with our semiconductorlicensees."

Manta Chip Development Tools

BOPS offers various software and hardware development tools for the Manta chip--the BOPS Software Development Kit (SDK), the BOPS Jordan(tm)EValuation Board (EVB) and the Manta Xemulator(tm) hardware emulator.Software, hardware, applications and SOC designers use these tools toquickly and efficiently evaluate, specify and develop SOCimplementations using BOPS programmable DSP cores.BOPS SDK integrates the compiler, assembler, linker, loader, debuggerand simulator tools into a seamless environment for DSP applicationdevelopment, and allows customers to convert C, C++ and MATLAB(R) filesquickly and efficiently into BOPS ManArray assembly code for their DSPapplications.High-level programs written in C and/or assembly can be compiled orassembled and linked and loaded into the BOPS Instruction Set Simulator(ISS) for execution, performance profiling, monitoring, optimization anddebugging.The Jordan EVB is a PCI card which contains up to a 266 MB per secondPCI bus, a 1 GB per second memory interface to 64Mbytes of SDRAM and a400 MB per second interface to a QED RM5231(tm) MIPS(R) RISC controller.The Manta Xemulator is a powerful emulation tool that offers an RTL(register transfer level) implementation of the Manta chip in FPGAs,including the PCI, SDRAM and MIPS SysA/D bus interface peripherals.Re-programming the FPGAs allow engineers to quickly modify the businterfaces to their own specific implementation and emulate the wholesystem.

How Manta Was Produced

BOPS, Cadence Design Systems (NYSE: CDN) and TSMC demonstrated the time-to-market advantages that BOPS core products provide and producedthe Manta chip.It took 3 1/2 months for Cadence Design Services to implement thephysical design from the time that BOPS handed over the DSP and I/Ologic RTL database. TSMC manufactured the Manta chip using a standard0.25- micron enhanced single-poly, 5-layer metal process."We designed the chip for fast time-to-market using a standard ASICdesign methodology, just like many of our SOC customers would", addedDr. David Baker, BOPS VP product development. "We focused on deliveringthe maximum performance using ASIC methodology and achievedindustry-leading 24 bops of performance in a little over three months ofphysical design work. We used flat ASIC layout techniques, except forregister files and memories, which used automated compiler tools. Thiscontrasts most programmable DSP vendors, who use long periods of customdesign and the most expensive processes to achieve performance. We havedemonstrated we can build a 24 bops, 1.3 GFLOP programmable DSP usingthe same design flow one uses for PCI or SDRAM control blocks."

Pricing and Availability

The BOPS SDK is immediately available and is priced from $4995 (USD) perseat. The Jordan EVB is immediately available and is bundled with theBOPS SDK for a price of $9995 (USD) per seat. The Manta Xemulator isavailable 14-16 weeks ARO (after receipt of order), and is bundled withthe BOPS SDK with a price of $24,995 per unit including a support andmaintenance agreement.BOPS licenses and supports the ManArray family of programmable DSPintellectual property (IP) cores in synthesizable RTL format withmanufacturing test suites, ISA compliance suites, hardware and softwaredevelopment tools to enable customers to quickly get to volumeproduction with their DSP-based SOC products. Contact BOPS for licensinginformation.

About BOPS, Inc.

BOPS Inc. is a Mountain View, Calif.-based company that develops and licenses the highest- performance programmable DSP core family, theManArray family, as well as development tools for high-volume, SOCsolutions for the Internet, multimedia and wireless communicationsmarkets.The BOPS ManArray DSP product family is targeted to accelerate SOCmanufacturers' time from product concept to high-volume shipments byproviding the highest-performance, scaleable and reusable DSP cores andan advanced set of software tool technologies.

Acronyms:

A/D:    Analog/Digital
ASIC:   Application Specific IC
bops:   Billions of Operations per Second
FPGA:   Field Programmable Gate Array
GB:     Gigabyte (1,000 megabytes or One Billion Characters of   Information)
GFLOPS: Giga Floating Point Operations per Second
DSP:    Digital Signal Processor
EVB:    EValuation Board
IC:     Integrated Circuit
I/O:    Input/Output
IP:     Intellectual Property
ISA:    Instruction Set Architecture
ISS:    Instruction Set Simulator
MB:     Megabyte (1,000 kilobytes)
PCI:    Peripheral Component Interface
RTL:    Register Transfer Level
SDRAM: Synchronous Dynamic Random Access Memory
SOC:    Systems-on-Chip
SDK:    Software Development Kit

Manta, ManArray, Jordan, BOPS, 2010FX, 2010FL, 2010XL, 2020FX, 2020FL, 2020XL, 2040FX, 2040FL and 2040XL are trademarks and BOPS(R) is a registered trademark of Bops, Inc. MATLAB is a registered trademark of The MathWorks, Inc. All other trademarks are property of their respective owners.

CONTACT:

BOPS, Inc.
Renee Anderson, 650/254-2810
renee@bops.com
or
BOPS PR Counsel
Georgia Marszalek, 650/345-7477
georgia@valleypr.com