MOSAID Introduces Industry's First Double Data Rate (DDR) SDRAM Physical Interface (PHY) Compiler

Enables designers to customize, optimize memory controller IP for specific applications

OTTAWA, Ontario – May 22, 2007 - MOSAID Technologies Inc. (TSX:MSD), is demonstrating the industry's first DDR SDRAM PHY compiler at the Design Automation Conference (DAC) June 4-7 in San Diego. The compiler enables customers to assemble a complete, customized high-performance DDR PHY while considering over 30 separate variables that affect the ultimate construction of the memory controller IP.

MOSAID's compiler automates the physical assembly of a DDR PHY by leveraging MOSAID's unique "tiling" approach to PHY construction where the individual components (tiles) of the PHY are connected by abutment. This method of connection eliminates extra wiring between PHY components, and ensures that the assembled PHY meets timing closure and other critical system requirements.

"We developed our DDR PHY compiler because we observed that each application required a different version of a DDR PHY, assembled from several key library components we provide to customers," said Michael Kaskowitz, Senior Vice President, Semiconductor IP at MOSAID. "Our PHY compiler gives customers the flexibility to run several 'what-if' scenarios until they zero in on the optimum PHY to address their unique requirements."

How MOSAID's DDR PHY Compiler Works
A graphical user interface (GUI) steps a user through a series of decisions as they construct a DDR PHY from critical hard IP including DLLs, Interface Timing Modules (ITMs) and SSTL I/Os. Variables under designer control include PHY type (such as DDR3/2 or DDR2/1), foundry and process node, memory channel width, power-to-signal ratio, core power requirements, and other physical placement variables. GUI outputs include an instantly viewable picture of the PHY layout, Verilog netlists for PHY implementation, cell placement scripts, a pin order file, text report files, and an optional define file and Verilog netlist for MOSAID's DDR memory controller when used with MOSAID's DDR PHY.

MOSAID is demonstrating a preliminary version of its DDR PHY compiler at DAC (booth number 5868) June 4-7 in San Diego, California. Datasheets for 130, 90, and 65nm MOSAID DDR PHYs are available from the MOSAID Customer Center at www.mosaid.com.

About MOSAID
MOSAID Technologies Incorporated makes semiconductors better through the development and licensing of intellectual property. MOSAID counts many of the world's largest semiconductor companies among its customers. Founded in 1975, MOSAID is based in Ottawa, Ontario, with an office in Santa Clara, California. For more information, visit www.mosaid.com.