ARC Announces Ultra Low Power Technology "Energy PRO" That Lowers Core and Subsystem Power by Four Fold

• Lead Customers Offered Early Access Program
• New ARC(R) Energy PRO Technology Implemented With New Hardware, Software, and EDA Solutions Enabling Efficient Power Management for Portable Applications

ST. ALBANS, England -- September 10, 2007 -- ARC International, the leader in configurable multimedia subsystems and CPUs/DSPs, today extended its leadership in enabling energy efficient system-on-chip (SoC) design by introducing "Energy PRO" technology that enables ultra low power operation. Configurability enables creation of power efficient cores. Energy PRO further reduces power consumption by as much as four fold. ARC's new Energy PRO technology is supported by hardware and software solutions, and integrated with a new low power EDA flow and libraries that have been specifically optimized to Energy PRO. See the companion news release by Cadence and ARC dated September 10, 2007 for more information.

Today ARC also announced an Early Access (EA) Program for its new Energy PRO technology that is available to a limited number of OEM and semiconductor companies. The EA Program enables qualified participants to be the first to market with this new industry leading low power technology, which is ideal for applications such as battery-operated mobile devices (WiFi and WiMAX technologies, and digital radios) and implantable medical products (pace makers and hearing aides).

"As SoC designers move to deep submicron technologies, managing power when the device is idle is as important as when it is functioning. Energy PRO technology takes direct aim at solving this challenge," said Paul Holt, vice president, product development and services at ARC International. "Energy PRO enables the intelligent management of power in an SoC to ensure that each logic or memory component is only using the amount of power needed to perform its function effectively at any moment in time. It includes hardware and software techniques necessary to conserve energy, and allows designers to dynamically take advantage of new power saving capabilities. Applications can use the techniques by directly leveraging the software APIs and code provided by ARC."

Why Save Power?

Today, our "always on, always connected" culture has made low power an essential feature for the vast array of electronic components that accompany us everyday. And the functionality of these devices is increasing as is the demand for battery power. While battery technology has only managed to increase by a factor of two to four in the last 30 years, computational power of digital integrated circuits has increased by more than four orders of magnitude. Even with new battery technologies, such as the rechargeable lithium polymers, battery capacity is not expected to improve by more than 30 to 40 percent over the next five years. In the absence of low power design techniques, future portable products will have either unreasonably heavy battery packs or a very short battery life.

Leveraging Hardware to Save Power

ARC's new Energy PRO technology provides multiple hardware techniques that can be exploited by the SoC designer to conserve energy. Clock gating can be used to shut off clocks when the ARC processor or subsystem is idle, reducing power consumption to less than 10 percent of nominal power consumption. Multiple power domains are provided that can be selectively powered-off, bringing the total power consumption to almost nil when the functionality is not needed. It is also possible to dynamically scale both voltage and frequency when only a subset of functionality is desired, reducing the power consumption by up to 75 percent. Designers may also choose to employ the different techniques based on the desired functionality of the SoC at any given time.

Leveraging the New Cadence EDA Flow to Save Power

ARC also provides a new, specially optimized reference design methodology (RDM) in its ARChitect(TM) Processor Configurator that captures the low power design intent of Energy PRO and conveys it to tape-out. Created in partnership with Cadence Design Systems, Inc., the new RDM is automatically generated in ARChitect and allows the designer to implement various Energy PRO features while taking advantage of Virage Logic's Area, Speed and Power (ASAP) Logic(TM) standard cell libraries and Ultra-Low-Power standard cell architecture.

Exploiting Energy PRO's Full Capability

Energy PRO technology can be used to intelligently manage power in an SoC to ensure that each logic or memory component is only using the amount of power needed to perform its function effectively at any moment in time. Energy PRO provides a hardware interface that the SoC designer can use to extend the low power techniques to other parts of the SoC. Thus, the SoC designer can coordinate power management across the SoC to derive maximum benefit from the technology.

Energy PRO also provides a software API that enables designers to use the power control features of the Energy PRO architecture. This Energy PRO API can be incorporated into any operating system or used directly by an application without an OS. ARC's MetaWare® tools provide the programming support for Energy PRO.

ARC's MQX® RTOS also supports Energy PRO by providing an API that allows designers to program Energy PRO specifically for a given application. The MQX RTOS can record power management activity for applications running on an SoC. Based on this information, the MQX RTOS APIs can be used to fine tune the Energy PRO power management and maximize power savings. The MQX RTOS can also intelligently adjust the power management settings based on thread requirements and workload profile to ensure power efficiency.

Availability

ARC will employ Energy PRO technology in future processor cores and multimedia subsystems targeting power sensitive applications. ARC's first Energy PRO-based processor core is available to qualified customers under the Early Access Program. For more information contact ARC sales representatives.

About ARC International plc

ARC International is the world leader in configurable media subsystems and CPU/DSP processors. Used by over 140 companies worldwide, ARC's configurable solutions enable the creation of highly differentiated system-on-chips (SoCs) that ship in hundreds of millions of devices annually. ARC's patented subsystems and cores are smaller, consume less power, and are less expensive to manufacture than competing products.

ARC International maintains a worldwide presence with corporate and research and development offices in Silicon Valley and St. Albans, UK. For more information visit www.ARC.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE:ARK - News).