New Algorithmic Acceleration System Features a Baker's Dozen of the Next Generation Spartan 6 FPGAs

December 15, 2009 -- The DINI Group Introduces the DNBFC_S12_PCIe featuring 13 of the largest low-cost Xilinx Spartan-6 FPGAs. This board provides unmatched price/performance ratios for FPGA-based hardware-in-the-loop acceleration. The board is hosted in a standard 4-lane GEN1/GEN2 PCIe slot and can provide data transfer rates to 1Gbyte/sec.

Each Spartan-6 FPGA contains more than 1 million ASIC gates and each FPGA has a dedicated 128M x16 DDR3 memory. Data intensive algorithms can attain nearly 1.5 gigabytes/second of memory bandwidth per FPGA. The Xilinx Sparatan-6 family has dedicated DDR3 controllers, making high-speed design push-button trivial. 100% of the FPGA resources are dedicated to the user application.

The DNBFC_S12_PCIe offers superior price/performance for applications like:

• Encryption/decryption
• Seismic analysis
• eal time data processing
• HD Video Compression
• Genomic searching algorithms such as Smith/Waterman

“This low power solution for data intensive applications provides super computer performance at a next generation price point,” says Mike Dini, President of the Dini Group. “Just one board will replace an entire farm of Linux servers.” Indeed, some algorithms can be accelerated 5000 times faster than a mere quad CPU PC. The system is available offthe- shelf directly from the Dini Group and its agents.

The Dini Group was established in 1995 as a consulting company. While developing ASICs for various clients they saw the need for cost effective logic emulation platforms and developed several of them. In 1998 they started selling these platforms as ASIC prototype to FPGA developers and IP designers. From their offices in La Jolla the dozen DINI Group employees have supplied over five billion ASIC gates.