Northwest Logic's PCI Express 3.0 Solution passes PCI-SIG PCIe 3.0 Compliance Testing at First Official PCIe 3.0 Compliance Workshop

Update: Rambus Completes Acquisition of Northwest Logic, Extending Leadership in Interface IP (Aug. 27, 2019 )

Beaverton, Oregon – June 5, 2013— Northwest Logic today announced that its PCI Express® (PCIe®) 3.0 solution, including the Expresso 3.0 Core (PCI Express 3.0 Controller Core) and Expresso DMA Core passed all Gold and Interoperability tests at the April 2013 PCI-SIG® Compliance Workshop. This testing was done with 8 lanes running at 8 Gbit/s SERDES rates at the first official PCIe 3.0 compliance workshop. See PCI-SIG Integrators List at http://www.pcisig.com/developers/compliance_program/integrators_list/pcie_3.0.

“Our successful compliance testing further verifies that Northwest Logic’s PCI Express 3.0 solution provides a robust and proven platform for developing PCI Express 3.0/2.1/1.1 based products. This solution is silicon-proven and available for both ASIC and FPGA platforms.” said Brian Daellenbach, President of Northwest Logic.

The PCI-SIG is responsible for the development of PCI-related standards including PCI Express, PCI-X® and PCI®. The PCI-SIG holds quarterly PCI Express Compliance Workshops where companies can compliance test their PCI Express products. The PCI Express Gold and Interoperability Compliance endpoint testing consists of:

• Interoperability Testing with a range of motherboard and switch products
• Physical Layer Testing using a high-performance oscilloscope
• Data-Link and Transaction Layer Testing using the Agilent Protocol Test Card
• Configuration Testing using configuration test software

“We’re pleased Northwest Logic has passed PCIe 3.0 compliance testing with its PCIe 3.0 IP products which aid designers by reducing the risk and cost of developing PCIe 3.0 designs,” said Al Yanes, PCI-SIG President and Chairman. “Its PCIe 3.0 compliant products ensure protocol adherence and interoperability which contributes to the continued success of the PCI Express standard.”

At the same Compliance Workshop, Xilinx, Inc. also successfully tested its Kintex®-7 FPGAs with GTX transceivers for compliance with the Northwest Logic’s Expresso 3.0 Core. Built on state-of-the-art 28nm HPL process technology, the Xilinx® 7 Series All Programmable FPGA family is a generation ahead with breakout performance, capacity, and system integration while optimizing price/performance/watt.

“As a distinguished Premier Member of the Xilinx Alliance Program, Northwest Logic worked closely with Xilinx to ensure their PCI Express cores and our FPGAs provide best-in-class PCI Express 3.0 performance and features,” stated Tom Feist, Senior Marketing Director of Design Methodology at Xilinx. “In addition, because this PCI-SIG validation was completed on Xilinx’s GTX transceiver technology, this solution also extends to Virtex®-7 FPGAs and Zynq®-7000 All Programmable SoCs.”

Key advantages of Northwest Logic’s PCI Express 3.0 solution include:

• Silicon Proven
• Complete solution significantly reduces development risk, cost and schedule
• Expresso DMA Core and Driver provides high-performance scatter-gather DMA support
• Provided with a testbench including PHY models for quick, out-of-the-box simulation
• Comprehensive FPGA and ASIC support
• High-quality technical support
• Customization and integration services available

About Northwest Logic

Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express solution (PCI Express 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (DDR4/3/2, LPDDR3/2 SDRAM; RLDRAM 3/II), and MIPI Solution (CSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit http://www.nwlogic.com.