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Gen-Z Consortium Announces the Public Release of its Core Specification 1.0Gen-Z Core Specification 1.0 Enables Silicon Development Beaverton, OR – February 13, 2018 – The Gen-Z Consortium, an organization developing an open standard interconnect designed to provide high-speed, low latency, memory-semantic access to data and devices, today shared the Gen-Z Core Specification 1.0 is publicly available on its website. The Gen-Z Core Specification 1.0 enables silicon providers and IP developers to begin the development of products enabling Gen-Z technology solutions. Gen-Z’s memory-centric standards-based approach focuses on providing an Open, reliable, flexible, secure, and high performance architecture for housing and analyzing the incredible amount of information at the edge coming into the data center. “Our membership has grown significantly throughout 2017, now totaling more than fifty members, and we are proud of the hard work that has culminated with the release of our first Core Specification,” said Gen-Z President, Kurtis Bowman. “We anticipate great things in 2018 as silicon developers begin implementing Gen-Z technology into their offerings and the ecosystem continues to grow.” Gen-Z technology supports a wide range of new storage class memory media and acceleration devices, features new hybrid and memory-centric computing technologies, and uses a highly efficient, performance-optimized solution stack. Its memory media independence and high bandwidth coupled with low latency enables advanced workloads and technologies for end-to-end secure connectivity from node level to rack scale. Learn more and download the Gen-Z Core Specification 1.0 on our website. Supporting Resources:
About Gen-Z Consortium Gen-Z is an open systems interconnect designed to provide memory semantic access to data and devices via direct-attached, switched or fabric topologies. The Gen-Z Consortium is made up of leading computer industry companies dedicated to creating and commercializing a new data access technology. The Consortium’s 12 initial members were; AMD, ARM, Broadcom, Cray, Dell EMC, Hewlett Packard Enterprise, Huawei, IDT, Micron, Samsung, SK hynix, and Xilinx with that list expanding as reflected on our Member List. The Gen-Z Consortium strongly believes in developing an open ecosystem where members, the broader industry, and customers can work together to deliver robust, high-quality specifications that meet solution needs. The Gen-Z Consortium will periodically publicly post draft specifications and technical concepts to elicit input from the broader industry and directly from customers. For more information visit www.genzconsortium.org. Member Company Quotes Alpha Data Inc. “The release of the Gen-Z Core Specification signals a new phase in bringing high-bandwidth AMD “AMD joins the other members of the Gen-Z Consortium in celebrating the release of the Gen-Z Gen 1.0 open standard for high-performance, cross platform interconnect technology. Low-latency access to memory and storage in the datacenter is an area of pressing need for open ecosystems and technology development. With this significant step, Gen-Z has defined an advanced, modern protocol designed to deliver a high-performance, cross-platform solution.” – Forrest Norrod, senior vice president and general manager, Datacenter and Embedded Systems Group, AMD Arm “Today’s hyperconnected world demands new levels of performance and scalability to analyze and process vast amounts of data in real-time. Open standards, such as Gen-Z, are key to delivering the compute and storage infrastructure solutions required to address this challenge.” – Drew Henry, senior vice president and general manager, Infrastructure Business Unit, Arm Avery “The release of the Gen-Z Consortium’s core specification V1.0 is a major milestone for enabling new innovation for in the compute and IT market segments. Avery is well positioned with its expertise in verification IP (VIP) to meet the needs and development efforts based on the 1.0 specification. Avery will be providing the Gen-Z development ecosystem with SystemVerilog/UVM models, functional test suites, and protocol checking to support new IP and silicon design starts in Q1 2018.” – Chris Browy, vice president of sales and marketing at Avery Broadcom “The completion of Core Specification 1.0 by the Gen-Z Consortium represents a major milestone toward defining a new open systems interconnect and represents another step toward making this technology a reality.” – Fazil Osman, Broadcom Distinguished Engineer Cavium “The Gen-Z Consortium is driving innovations in Memory-Driven Computing enabling a new compute paradigm for a variety of applications, including the next generation data center, cloud, and high-performance computing. ThunderX2 is our second-generation 64-bit Armv8 server processor SoC family optimized to deliver high compute performance, outstanding memory bandwidth and memory Capacity. Cavium along with our partners was one of the first to demonstrate implementation of the Gen-Z interconnect on ThunderX2 ARM server. We are excited to be part of this effort to work with other member companies to significantly improve the performance and latency of key Cloud and HPC workloads.” – Gopal Hegde, VP/GM Data Center Processor Group at Cavium Dell EMC “Dell EMC is very encouraged to see Gen-Z Consortium’s release of their 1.0 spec. The application of Gen-Z in key workloads like Machine Learning, Data Analytics, and In-Memory Computing show that it is a critical part of the future of enterprise system architecture. When you couple this with the fact that it is an open industry standard then it fits very well into Dell EMC’s philosophy and product plans.” – Ashley Gorakhpurwalla, President and General Manager, Server Solutions Group, Dell EMC Everspin Technologies “Gen-Z, with its low latency, byte addressable memory semantic fabric, enables the value of high-speed persistent memory, like STT-MRAM, to scale far beyond what is possible today. With a focus on ease of use, reduced or elimination of software interaction, overcoming current architectural limitations, Gen-Z will be able to deliver unprecedented performance at scale. Everspin enthusiastically supports the open Gen-Z standard as part of our efforts to unlock the potential of STT-MRAM as persistent memory.” – Kevin Conley, CEO, Everspin Technologies Hewlett Packard Enterprise “The public release of the Gen-Z Core Specification 1.0 is a significant milestone to enable an open ecosystem of innovation in computing devices of every size, from the IoT edge to data centers to supercomputing. As one of the founding Gen-Z Consortium members, Hewlett Packard Enterprise will leverage Gen-Z’s fabric technology to advance HPE’s Memory-Driven Computing agenda to deliver an entirely new way of computing that will power the next wave of high-performance and data analytics applications for our customers.” – Alain Andreoli, Senior Vice President and General Manager, Hybrid IT Group, Hewlett Packard Enterprise IntelliProp Inc. “The release of the Gen-Z Core Specification 1.0 will kick start Gen-Z product development in earnest and IntelliProp is developing both IP Cores and ASSP product solutions. IntelliProp will release a full package of Gen-Z IP Cores, including Requester/Responder, that will support Rev 1.0 of the specification in the first quarter of 2018, for both FPGA and ASICs. Development also continues on the “Cobra” Gen-Z Hybrid Memory Controller, which has been used to support the Gen-Z Consortium demo. The “Cobra” media controller provides for low latency, fabric attached persistent memory storage using DRAM and NAND.” – Hiren Patel, VP of Business Development at IntelliProp Inc. Mellanox Technologies “The Gen-Z Consortium fosters eco-system discussions and developments of higher performance and richer capabilities for future data center connectivity. The release of the 1.0 Gen-Z Specification is a major milestone, which will enable companies and organizations to move into next level of implementations.” – Gilad Shainer, vice president of marketing at Mellanox Technologies Micron “2018 will provide a new era of opportunities, where data centers must make decisions in memory to respond quickly to the sheer volume of data being created and analyzed. The Gen-Z Specification provides a flexible foundation for customers to address near-term data opportunities like these and make the most of new memory technologies.” – Malcolm Humphrey, Vice President of Marketing for Micron’s Compute and Networking Business Unit Microsemi “The Gen-Z Core Specification 1.0 release will enable the first commercial products for memory-centric architectures. These solutions will deliver improved efficiency and performance for a wide variety of applications including in-memory databases, real-time analytics, high performance computing, and artificial intelligence. The broad coalition of Gen-Z members signals the strong commitment of both suppliers and customers to the emergence of products utilizing this open standard. Microsemi’s expertise in high speed signaling, low latency high bandwidth fabrics, data protection and security makes us a natural fit as an innovative supplier for this emerging market.” – Pete Hazen, Vice President and General Manager of Microsemi’s Data Center Solutions Business Unit Samsung Electronics “The release of core specification 1.0 today is a significant step towards realization of new architectures and evolution of existing technologies to expand into new roles. Samsung is excited to be a member of the Gen-Z Consortium and is committed towards industry open standards.” – Harry Yoon, Vice President of Memory Product Planning & Application Engineering Team, Samsung Electronics SK hynix, Inc. “As one of the founding members of the Gen-Z Consortium, SK hynix truly welcomes the completion of Gen-Z Core Spec 1.0. Now that the essential spec work is complete and several customers endorse Gen-Z, there will be more opportunities to develop emerging memory solutions that can enable more scalable memory systems in the next decade.” – Sunny Khang, Vice President, Head of DRAM Product Planning Office, SK hynix, Inc. Western Digital “Persistent memory technologies will radically redefine how we harness and understand the rapidly increasing volume and velocity of mass data, and enable us to realize new data possibilities across a broad range of Big Data and Fast Data applications. On-going collaboration with ecosystem partners and customers to establish standardized interfaces for CPUs and emerging memories, including the important work done by the Gen-Z Consortium, is pivotal to realizing the full potential of persistent memory.” – Richard New, vice president of research at Western Digital Xilinx, Inc. “Gen-Z addresses the broad need for a memory-semantic fabric that will enable new use cases and innovative system designs. We congratulate the Gen-Z Consortium in accomplishing this significant milestone that paves the way for product development.” – Manish Muthal, vice president datacenter markets, Xilinx, Inc.
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