Arm demonstrates new IoT test chip and board for highly efficient, secure IoT designs

Built on Samsung Foundry 28nm FD-SOI process technology, the Musca-S1 test chip demonstrates a new choice in SoC design for IoT solutions

May 14, 2019 --Today at the Samsung Foundry Forum, Arm, in collaboration with Samsung Foundry, Cadence, and Sondrel, demonstrated the first 28nm fully-depleted silicon-on-insulator (FD-SOI) embedded MagnetoResistive Random Access Memory (eMRAM) IoT test chip and development board. The Musca-S1 is designed to offer more choice to IoT designers in their system-on-chip (SoC) development journey. Designers can now easily implement more secure, holistic IoT solutions, enabling them to focus more on core product differentiation and accelerating time-to-market.

“The promise of a world transformed by a trillion connected devices is not far in the future, but for IoT devices to scale we must continue to put a range of technology options in front of designers to test and evaluate,” said Gus Yeung, VP, GM and Fellow, Physical Design Group, Arm. “This collaboration has yielded a true end-to-end solution that ensures IoT designers can prototype their product designs from device-to-data security.”

Relative to previous Musca solutions, the Musca-S1 test chip board now includes testing and evaluation of new eMRAM technology for reliable, low-power and secure device development through secure memory implementation. eMRAM technology offers advantages over traditional embedded flash (eFlash) memory technology, as it can easily scale below 40nm process technology, giving SoC designers more flexibility to scale their memory needs based on the memory and power requirements of various use-cases.

Musca-S1 test chip demonstrates a combination of on-chip power control, Samsung Foundry’s Reverse Body Biasing (RBB) and eMRAM non-volatile memory power shutdown, allowing for testing and evaluation of new classes of highly energy-efficient, controlled IoT devices. And for the first time on Samsung Foundry silicon, designers will have the opportunity to run Arm® Mbed™OS as well as test device and data management capabilities using the Arm Pelion™ IoT platform.

By combining Arm IP and software solutions on a single board, IoT designers can test and evaluate Arm’s end-to-end secure IoT solution, showcasing highly energy-efficient and secure IoT at scale. Additionally, the Musca-S1 test chip board can further reduce costs and time-to-market by giving designers the flexibility to repurpose the reference design for future products.

Musca-S1 test chip and development board

• Has achieved PSA Certified Level 1 certification and brings together key components of the Arm IoT security portfolio including Arm CryptoCell-300 Family, Arm Coresight™, Arm TrustZone®, and Trusted Firmware-M (TF-M).
• Powered by Arm Cortex®-M33 cores, built with Arm Corstone™-200 secure foundation IP and hardware verified using Arm Keil® MDK and ULINK-Plus™ probe.
• Utilizes Sondrel’s design services to accelerate development schedules for designers.
• Reduces design risks using digital implementation, signoff and verification flow and standards-based IP from Cadence.

Availability and more information
The Musca-S1 test chip and development board is on display at Samsung Foundry Forum North America in San Jose, CA as part of an air sensor IoT application demo, featuring the device and data management capabilities of the Arm Pelion IoT platform.

The Musca-S1 will be available in limited quantities in Q3 2019, and is targeted for loan to customers in Q4 2019. Contact Arm for more information on the Musca-S1 test chip and development board.

Supporting Quotes

Jaehong Park, executive vice president of Design Platform Development, Samsung Electronics

“This collaboration with our SAFE Partners Arm, Cadence and Sondrel brings the Arm Musca test chip and development board to Samsung Foundry silicon for the first time. The combination of Musca-S1 and working 28FD-SOI silicon reassures IoT designers they can achieve faster development, deploy body biasing and integrate eMRAM technology in their next-generation IoT devices for enhanced energy efficiency and IoT security.”

KT Moore, vice president, product management in the Digital & Signoff Group, Cadence

“The Musca-S1, the industry’s first silicon-proven 28nm FD-SOI eMRAM and Cadence® IP-based IoT SoC, was implemented using the Cadence digital and signoff full-flow solution, which supports back biasing from synthesis through signoff, including physical verification and DFM signoff. In addition, the Musca-S1 was verified using the Cadence Verification Suite, with protocol compliance verified with Cadence VIP and memory models. Through our collaboration with Arm, Samsung and Sondrel, we’re enabling mutual customers to confidently create power-efficient MRAM-enabled IoT edge-devices with built-in security and connectivity capabilities, as well as further accelerating innovation in emerging application areas.”

Graham Curren, CEO, Sondrel

“Musca-S1 is not just a design solution to secure internet connected devices and manage them at scale, but a simple and safe route to market based on a collaboration between semiconductor industry leaders. It addresses products from the simplest to the most intelligent edge node devices, and brings together the best combination of tools, technology, processes and people to set a new standard for robust IoT device design.”

About Arm

Arm technology is at the heart of a computing and connectivity revolution that is transforming the way people live and businesses operate. Our advanced, energy-efficient processor designs have enabled intelligent computing in more than 130 billion chips and our technologies now securely power products from the sensor to the smartphone and the supercomputer. In combination with our IoT device, connectivity and data management platform, we are also enabling customers with powerful and actionable business insights that are generating new value from their connected devices and data. Together with 1,000+ technology partners we are at the forefront of designing, securing and managing all areas of compute from the chip to the cloud.